메뉴 건너뛰기




Volumn 147, Issue 1, 2000, Pages 19-27

Performance comparison of high-order IFLF and cascade analogue integrated lowpass filters

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; FEEDBACK AMPLIFIERS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; OPERATIONAL AMPLIFIERS; SENSITIVITY ANALYSIS; TRANSCONDUCTANCE;

EID: 0033887809     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:20000057     Document Type: Article
Times cited : (17)

References (29)
  • 1
    • 0026835643 scopus 로고    scopus 로고
    • 10-MHz programmable continuous-time 0.05° equiripple linear phase filter', IEEEJ. Solid-State Circuits, 1992, 27, (3), pp. 324-331
    • DE VEIRMAN, G.A., and YAMASAKI, R.G.: 'Design of a bipolar 10-MHz programmable continuous-time 0.05° equiripple linear phase filter', IEEEJ. Solid-State Circuits, 1992, 27, (3), pp. 324-331
    • G.A., and YAMASAKI, R.G.: 'Design of A Bipolar
    • Veirman, D.E.1
  • 2
    • 0027578595 scopus 로고    scopus 로고
    • 20-MHz sixth-order BiCMOS parasitic-insensitive continuous-time filter and second-order equaliser optimized for disk-drive read channels', IEEE J. Solid-Slate Circuits, 1993, 28, (4), pp. 462-470
    • LABER, C.A., and GRAY, P.R.: 'A 20-MHz sixth-order BiCMOS parasitic-insensitive continuous-time filter and second-order equaliser optimized for disk-drive read channels', IEEE J. Solid-Slate Circuits, 1993, 28, (4), pp. 462-470
    • And GRAY, P.R.: 'A
    • Laber, C.A.1
  • 3
    • 0029345603 scopus 로고    scopus 로고
    • 3.0V 40 Mb/s hard disk drive read channel 1C', IEEEJ. Solid-State Circuits, 1995,30, (7), pp. 788-799
    • DE VEIRMAN, O.A.: 'A 3.0V 40 Mb/s hard disk drive read channel 1C', IEEEJ. Solid-State Circuits, 1995,30, (7), pp. 788-799
    • O.A.: 'A
    • Veirman, D.E.1
  • 4
    • 0030286869 scopus 로고    scopus 로고
    • 160-MHz analogue front-end 1C for EPR-IV PRML magnetic storase read channels', IEEEJ. Solid-Stale Circuits, 1996, 31, (fl), pp. 1803-1816
    • PAI, P.K.D., BREWSTER, A.D., and AB1DI, A.A.: 'A 160-MHz analogue front-end 1C for EPR-IV PRML magnetic storase read channels', IEEEJ. Solid-Stale Circuits, 1996, 31, (fl), pp. 1803-1816
    • BREWSTER, A.D., and AB1DI, A.A.: 'A
    • Pai, P.K.D.1
  • 6
    • 0031359736 scopus 로고    scopus 로고
    • 70-mV seven-order filter with 7-50 MHz cutoff frequency and programmable boost and group delay equalisation', IEEE J. Solid-State Circuits, 1997,32, (12), pp. 1987-1999
    • REZZI, F., BIETTI, I., CAZZANIGA, M., and CASTELLO, R.: 'A 70-mV seven-order filter with 7-50 MHz cutoff frequency and programmable boost and group delay equalisation', IEEE J. Solid-State Circuits, 1997,32, (12), pp. 1987-1999
    • BIETTI, I., CAZZANIGA, M., and CASTELLO, R.: 'A
    • Rezzi, F.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.