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Volumn 30, Issue 7, 1995, Pages 788-799

A 3.0 V 40 Mb/s Hard Disk Drive Read Channel IC

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER PROGRAMMING; ELECTRIC FILTERS; ELECTRIC LOSSES; GAIN CONTROL; HARD DISK STORAGE; INTERFACES (COMPUTER); VOLTAGE CONTROL;

EID: 0029345603     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.391118     Document Type: Article
Times cited : (7)

References (7)
  • 1
    • 84932494818 scopus 로고
    • A 32 Mbit/s fully integrated read channel for disk drive applications
    • Feb.
    • J. Kovacs and W. Palmer, “A 32 Mbit/s fully integrated read channel for disk drive applications,” in ISSCC Dig. of Tech. Papers, Feb. 1992, pp. 62–63.
    • (1992) ISSCC Dig. of Tech. Papers , pp. 62-63
    • Kovacs, J.1    Palmer, W.2
  • 2
    • 84932448522 scopus 로고
    • A 24 Mbit/s 1,7 read channel combo for disk drive applications
    • May
    • K. Lam et al., “A 24 Mbit/s 1,7 read channel combo for disk drive applications,” Proc. CICC, May 1993, pp. 10. 1.1–10.1.4.
    • (1993) Proc. CICC , pp. 10.1.1-10.1.4
    • Lam, K.1
  • 3
    • 84963884905 scopus 로고
    • A 27 MHz programmable bipolar 0.05° equiripple linear phase lowpass filter
    • Feb.
    • G. A. De Veirman and R. G. Yamasaki, “A 27 MHz programmable bipolar 0.05° equiripple linear phase lowpass filter,” in ISSCC Dig. of Tech. Papers, Feb. 1992, pp. 64–65.
    • (1992) ISSCC Dig. of Tech. Papers , pp. 64-65
    • De Veirman, G.A.1    Yamasaki, R.G.2
  • 4
    • 0026835643 scopus 로고
    • Design of a bipolar 10 MHz programmable continuous-time 0.05° equiripple linear phase filter
    • Mar.
    • G. A. De Veirman and R. G. Yamasaki, “Design of a bipolar 10 MHz programmable continuous-time 0.05° equiripple linear phase filter,” IEEE J. Solid-State Circuits, vol. 27, pp. 324–331, Mar. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 324-331
    • De Veirman, G.A.1    Yamasaki, R.G.2
  • 6
    • 84933421427 scopus 로고
    • A 15 Mb/s data separator and write compensation circuit for Winchester disk drives
    • Feb.
    • J. T. Kellis and S. Mehrotra, “A 15 Mb/s data separator and write compensation circuit for Winchester disk drives,” in ISSCC Dig. of Tech. Papers, Feb. 1986, pp. 232–233.
    • (1986) ISSCC Dig. of Tech. Papers , pp. 232-233
    • Kellis, J.T.1    Mehrotra, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.