An evolvable hardware FPGA for adaptive hardware

Proceedings of the 2000 Congress on Evolutionary Computation, CEC 2000

Volumn 1, Issue , 2000, Pages 553-560

  Haddow, Pauline C ^a   Tufte, Gunnar ^a  

^a NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; TECHNOLOGY; COMPUTER HARDWARE; LOGIC DESIGN;

ADAPTIVE DESIGNS; EVOLVABLE HARDWARE; FPGA TECHNOLOGY; IS-ENABLED; PARTIAL CONFIGURATION; PROPOSED ARCHITECTURES; ROUTING RESOURCES; SELF RECONFIGURATION;

HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS;

ADAPTIVE HARDWARE; EVOLVABLE HARDWARE;

EID: 0033667061     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CEC.2000.870345     Document Type: Conference Paper

References (34)

1. [ÀN95] R. Àserud and I.R. Nielsen. Trends in Current Analogue Design. Analogue Integrated Circuits and Signal Processing, 7(1), 1995.
2. [dG93] H. de Garis. Artifical Life: Growing an Artificial Brain with a Million Neural Net Modules Inside a Trillion Cell Cellular Automata Machine. In 4th International Symposium on Micro Machine & Human Science, 1993.
3. [dG96] H. de Garis. CAM-BRAIN The Evolutionary Engineering of a Billion Neuron Artificial Brain by 2001 Which Grows/Evolves at Electronic Speeds Inside a Cellular Automata machine (CAM). In Towards Evolvable Hardware : the Evolutionary Engineering Approach, volume 1062 of Lecture Notes in Computer Science, pp 76-98. Springer, 1996.
4. [FMT98] T. C. Fogarty, J. F. Miller, and P. Thomson. Evolving Digital Logic Circuits in Xilinx 6000 Family FPGAs. In Soft Computing in Engineering Design and Manufacturing, pp 299-305. Springer, 1998.
5. [FS98] S. J. Flockton and K. Sheehan. Intrinsic Circuit Evolution Using Programmable Analogue Arrays. In 2nd International Conference on Evolvable Systems (ICES98), Lecture Notes in Computer Science, pp 144-153. Springer, 1998.
6. [HIM94] T. Higuchi, H. Iba, and B. Manderick. Massively Parallel Artificial Intelligence, chapter 12. Evolvable Hardware, pp 398-421. MIT Press, 1994.
7. [Hol75] J.H. Holland. Adaption in Natural and Artificial Systems. The University of Michigan Press, 1975.
8. [HPTB98] A. Hamilton, K. Papathanasiou, M. R. Tamplin, and T. Brandtner. Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware. In 2nd International Conference on Evolvable Systems (ICES98), Lecture Notes in Computer Science, pp 335-344. Springer, 1998.
9. [HW97] J. R. Hauser and J. Wawrzynek. Garp: A MIPS Processor with a Reconfigurable Coprocessor. In IEEE Symposium on FPGAs for Custom Computing Machines (FCCM97), pp 2433, 1997.
10. [Kea97] J.R. Koza et al. Automated Synthesis of Analog Electrical Circuits by Means of Genetic Programming. IEEE Transactions on Evolutionary Computation, 1(2) pp 109-128, July 1997.
11. [Lay98] P. Layzell. A New Research Tool for Intrinsic Hardware Evolution. In 2nd International Conference on Evolvable Systems (ICES98), Lecture Notes in Computer Science, pp 47-56. Springer, 1998.
12. [Mac99a]N. Macias. The PIG Paradigm: The Design and Use of a Massively Parallel Fine Grained Self-Reconfigurable Infinitely Scalable Architecture. In The 1st NASAIDoD Workshop on Evolvable Hardware, pp 175-180, 1999.
13. [Mac99b]N. Macias. Ring Around the PIG: A Parallel GA with Only Local Interactions Coupled with a Self-Reconfigurable Hardware Platform to Implement an O(l) Evolutionary Cycle for Evolvable Hardware. In Proc. of the 1999 Congress on Evolutionary Computation (CEC99), pp 10671078. IEEE, 1999.
14. [MD96]E. Mirsky and A. DeHon. MATRIX: A Re-configurable Computing Architecture with Configurable Instruction Distribution and Deploy-able Resources. In IEEE Symposium on FPGAs for Custom Computing Machines (FCCM96), pp 157-166,1996.
15. [MYA+98] M. Murakawa, S. Yoshizawa, T. Adachi, K. Suzuki, K. Takasuka, M. Iwata, and T. Higuchi. Analogue EHW Chip for Intermediate Frequency Filters. In 2nd International Conference on Evolvable Systems (ICES98), Lecture Notes in Computer Science, pp 134-143. Springer, 1998.
16. [MYK+99] M. Murakawa, S. Yoshizawa, I. Kajitani, X. Yao, N Kajihara, M. Iwata, and T. Higuchi. The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing. IEEE Transactions on Computers, 48(6) pp 628-639, June 1999.
17. [Ozs98] I Ozsvald. Short-Circuting the Design Process: Evolutionary Algorithms for Circuit Design using Reconfigurable Analogue Hardware, Masters Thesis. University of Sussex, UK, 1998.
18. [PRH00] S. Perkins, P. Reid, and N. Harvey. Everything on the Chip: A Hardware-Based Self-Contained Spatially-Structured Genetic Algorithm for Signal Processing. In 3rd International Conference on Evolvable Systems (ICES00), Lecture Notes in Computer Science, pp 165-174. Springer, 2000.
19. [Sem97] Semiconductor Industry Association. The National Technology Roadmap for Semiconductors, 1997.
20. [SFHSL98] A. Stoica, A. Fukunaga, K. Hayworth, and C. Salazar-Lazaro. Evolvable Hardware for Space Applications. In 2nd International Conference on Evolvable Systems (ICES98), Lecture Notes in Computer Science, pp 166-173. Springer, 1998.
21. [SGM+97] M. Sipper, M. Goeke, D. Mange, A. Stauffer, E. Sanchez, and M. Tomassini. The Firefly Machine: Online Evolware. In Proc. of 1997 International Conference on Evolutionary Computation (ICEC97), pp 181-186. IEEE, 1997.
22. [SKTSL99] A. Stoica, D. Keymeulen, R. Tawel, and C.and Wei-Te Li Salazar-Lazaro. Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits. In The 1st NASAIDoD Workshop on Evolvable Hardware, pp 76-84,1999.
23. [SZKOO] A. Stoica, R. Zebulum, and D. Keymeulen. Mix-trinsic Evolution. In 3rd International Conference on Evolvable Systems (ICESOO), Lecture Notes in Computer Science, pp 208-217. Springer, 2000.
24. [TH99] G. Tufte and P. C. Haddow. Prototyping a GA Pipeline for Complete Hardware Evolution. In The 1st NASAIDoD Workshop on Evolvable Hardware, 18-25, 1999.
25. [THH96] A. Thompson, I. Harvey, and P Husbands. Unconstrained Evolution and Hard Consequences. In Towards Evolvable Hardware : the Evolutionary Engineering Approach, volume 1062 of Lecture Notes in Computer Science, pp 136-165. Springer, 1996.
26. [Tho95] A. Thompson. Evolving Electronic Robot Controllers that Exploit Hardware Resources. In The 3rd European Conference on Artificial life (ECAL95), 1995.
27. [Tho96] A. Thompson. An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics. In 1st International Conference on Evolvable Systems (ICES96), Lecture Notes in Computer Science, pp 390-405. Springer, 1996.
28. [Tho98] A. Thompson. Hardware Evolution Automatic Design of Electronic Circuits in Reconfigurable Hardware by Artificial Evolution. Springer, 1998.
29. [TLZ99] A. Thompson, P. Layzell, and R. S. Zebulum. Explorations in Design Space: Unconventional electronics design through artificial evolution. IEEE Transactions on Evolutionary Computation, 3(3) pp 167-196, September 1999.
30. [XDA97] Xilinx Databook: "XC4000E andXC 4000X Series Field Programmable Gate Arrays Product Specification, 1.4 edition, 1997.
31. [XRE97] Xilinx XC6200 Field Programmable Gate Arrays Product Specification, l.lOedition, 1997.
32. [XVE98] Xilinx Virtex 2.5VField Programmable Gate Arrays Product Specification, 1.1-advance edition, 1998.
33. [ZPV96] R.S. Zebulum, M.A. Pacheco, and M. Vellasco. Evolvable System in Hardware Design: Taxonomy, Survey and Applications. In 1st International Conference on Evolvable Systems (ICES96), Lecture Notes in Computer Science, pp 344-358. Springer, 1996.
34. [ZPV99] R. S. Zebulum, M. A. Pacheco, and M. Vellasco. Artificial Evolution of Active Filters: A Case Study. In The 1st NASAIDoD Workshop on Evolvable Hardware, pp 66-75, 1999.