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Volumn 1801, Issue , 2000, Pages 165-174

Everything on the chip: A hardware-based self-contained spatially-structured genetic algorithm for signal processing

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL FILTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENETIC ALGORITHMS; SIGNAL RECONSTRUCTION; STRUCTURED PROGRAMMING;

EID: 84937389502     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46406-9_17     Document Type: Conference Paper
Times cited : (13)

References (8)
  • 1
    • 84939764389 scopus 로고
    • Bit-serial realizations ol a class of nonlinear filters based on positive boolean functions
    • Chen, K. (1989). Bit-serial realizations ol a class of nonlinear filters based on positive boolean functions. IEEE Transactions on Circuits and Systems, 36(6).
    • (1989) IEEE Transactions on Circuits and Systems , vol.36 , Issue.6
    • Chen, K.1
  • 2
    • 0025591132 scopus 로고
    • The application of an adaptive plan to the configuration of nonlinear image processing algorithms
    • Chu, C. (1990). The application of an adaptive plan to the configuration of nonlinear image processing algorithms. In SPIE Proceedings - Nonlinear Image Processing, volume 1247, pages 248-257.
    • (1990) SPIE Proceedings - Nonlinear Image Processing , vol.1247 , pp. 248-257
    • Chu, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.