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Volumn 30, Issue 9, 1999, Pages 875-886

Mixed serial-parallel sensing scheme for a 64-Mbit 4-bit/cell factory-programmed OTP-ROM

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; NONVOLATILE STORAGE;

EID: 0032679086     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(99)00026-9     Document Type: Article
Times cited : (2)

References (17)
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    • (1995) Proc. IEEE ESSDERC , pp. 213-216
    • De Graaf, C.1    Young, P.2    Hulsbos, D.3
  • 7
    • 0030402010 scopus 로고    scopus 로고
    • A sixteen level scheme enabling 64-Mbit Flash memory using 16-Mbit technology
    • Kencke D.L., Richart R., Garg S., Banerjee S.K. A sixteen level scheme enabling 64-Mbit Flash memory using 16-Mbit technology. IEDM Tech. Digest. 1996;937-939.
    • (1996) IEDM Tech. Digest , pp. 937-939
    • Kencke, D.L.1    Richart, R.2    Garg, S.3    Banerjee, S.K.4
  • 10
    • 0006933471 scopus 로고    scopus 로고
    • An 8b resolution 360 μs write time non-volatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS)
    • Kim K.-H., Lee K. An 8b resolution 360 μs write time non-volatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS). 1998 IEEE ISSCC Dig. Tech. Papers. 459:1998;336-337.
    • (1998) 1998 IEEE ISSCC Dig. Tech. Papers , vol.459 , pp. 336-337
    • Kim, K.-H.1    Lee, K.2
  • 12
    • 0022738392 scopus 로고
    • A four-state EEPROM using floating-gate memory cells
    • Bleiker A., Melchior H. A four-state EEPROM using floating-gate memory cells. IEEE J. Solid-State Circuits. 22:(3):1987;460-463.
    • (1987) IEEE J. Solid-State Circuits , vol.22 , Issue.3 , pp. 460-463
    • Bleiker, A.1    Melchior, H.2
  • 14
    • 0016961262 scopus 로고
    • On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique
    • Dickson J. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique. IEEE J. Solid-State Circuits. 11:(3):1976;374-378.
    • (1976) IEEE J. Solid-State Circuits , vol.11 , Issue.3 , pp. 374-378
    • Dickson, J.1
  • 15
    • 0027545680 scopus 로고
    • Double and triple charge pump for power IC: Dynamic models which take parasitic effects into account
    • Di Cataldo G., Palumbo G. Double and triple charge pump for power IC: dynamic models which take parasitic effects into account. IEEE Trans. Circuits Syst. 40-I:(2):1993;92-101.
    • (1993) IEEE Trans. Circuits Syst. , vol.401 , Issue.2 , pp. 92-101
    • Di Cataldo, G.1    Palumbo, G.2
  • 16
    • 0031210141 scopus 로고    scopus 로고
    • A dynamic analysis of the Dickson charge pump circuit
    • Tanzawa T., Tanaka T. A dynamic analysis of the Dickson charge pump circuit. IEEE J. Solid-State Circuits. 32:(8):1997;1231-1240.
    • (1997) IEEE J. Solid-State Circuits , vol.32 , Issue.8 , pp. 1231-1240
    • Tanzawa, T.1    Tanaka, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.