Technological and design constraints for multilevel flash memories

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 1996, Pages 1005-1008

  Calligaro, C ^a   Manstretta, A ^a   Modelli, A ^a   Torelli, G ^a  

^a UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; TRANSCONDUCTANCE; VOLTAGE DISTRIBUTION MEASUREMENT;

MULTILEVEL FLASH MEMORIES; READ DISTURBS; READ VOLTAGE; SENSE AMPLIFIER SENSITIVITY; THRESHOLD VOLTAGE DISTRIBUTION;

SEMICONDUCTOR STORAGE;

EID: 0030358513     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)