Deterministic BIST with multiple scan chains

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 14, Issue 1, 1999, Pages 85-93

  Kiefer, Gundolf ^a   Wunderlich, Hans Joachim ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; LOGIC GATES;

MULTIPLE SCAN CHAINS;

BUILT-IN SELF TEST;

EID: 0032668047     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008353423305     Document Type: Article

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