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Volumn , Issue , 1997, Pages 240-253
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Technology mapping for speed-independent circuits: Decomposition and resynthesis
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
ASYNCHRONOUS SEQUENTIAL LOGIC;
BOOLEAN FUNCTIONS;
LOGIC GATES;
SPEED INDEPENDENT CIRCUITS;
TECHNOLOGY MAPPING;
COMBINATORIAL CIRCUITS;
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EID: 0030678724
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (17)
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References (18)
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