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Volumn 33, Issue 12, 1998, Pages 2139-2146

A 4.25-Gb/s CMOS fiber channel transceiver with asynchronous tree-type demultiplexer and frequency conversion architecture

Author keywords

10b8B; 8B10B; Asynchronous DEMUX; CMOS integrated circuits; Fiber channel transceiver; Frequency conversion circuit

Indexed keywords

FREQUENCY CONVERTER CIRCUITS; LSI CIRCUITS; MULTIPLEXING EQUIPMENT; TRANSCEIVERS;

EID: 0032320936     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.735557     Document Type: Article
Times cited : (29)

References (9)
  • 2
    • 0031073621 scopus 로고    scopus 로고
    • A 1.0625 Gbps transceiver with 2x-oversampling and transmit signal pre-emphasis
    • Feb.
    • A. Fiedler, R. Mactaggart, J. Welch, and S. Krihnan, "A 1.0625 Gbps transceiver with 2x-oversampling and transmit signal pre-emphasis," in ISSCC Dig. Tech. Papers, Feb. 1997, vol. 40, pp. 238-239.
    • (1997) ISSCC Dig. Tech. Papers , vol.40 , pp. 238-239
    • Fiedler, A.1    Mactaggart, R.2    Welch, J.3    Krihnan, S.4
  • 3
    • 0031070310 scopus 로고    scopus 로고
    • A 1.25 Gb/s, 460 mW COMS transceiver for serial data communication
    • Feb.
    • D. Chen and M. O. Baker, "A 1.25 Gb/s, 460 mW COMS transceiver for serial data communication," in ISSCC Dig. Tech. Papers, Feb. 1997, vol. 40, pp. 242-243.
    • (1997) ISSCC Dig. Tech. Papers , vol.40 , pp. 242-243
    • Chen, D.1    Baker, M.O.2
  • 4
    • 0030400848 scopus 로고    scopus 로고
    • A 0.8-μm CMOS 2.5 Gb/s oversampling receiver and transmitter for serial links
    • Dec.
    • C. K. Yang and M. A. Horowitz, "A 0.8-μm CMOS 2.5 Gb/s oversampling receiver and transmitter for serial links," IEEE J. Solid-State Circuits, vol. 31, pp. 2015-2023, Dec. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 2015-2023
    • Yang, C.K.1    Horowitz, M.A.2
  • 5
    • 0031343173 scopus 로고    scopus 로고
    • A 0.6 mm CMOS 4Gb/s transceiver with data recovery using oversampling
    • June
    • C. K. Yang, R. Farjad-Rad, and M. Horowitz, "A 0.6 mm CMOS 4Gb/s transceiver with data recovery using oversampling." in 1997 Symp. VLSI Circuits Dig., June 1997, pp. 71-72.
    • (1997) 1997 Symp. VLSI Circuits Dig. , pp. 71-72
    • Yang, C.K.1    Farjad-Rad, R.2    Horowitz, M.3
  • 9
    • 0020812712 scopus 로고
    • A DC-balanced, partitioned-block, 8B/10B transmission code
    • Sept.
    • A. X. Widmer and P. A. Franaszek, "A DC-balanced, partitioned-block, 8B/10B transmission code," IBM J. Res. Develop, vol. 27, no. 5, pp. 440-451, Sept. 1983.
    • (1983) IBM J. Res. Develop , vol.27 , Issue.5 , pp. 440-451
    • Widmer, A.X.1    Franaszek, P.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.