Design and implementation of differential cascode voltage switch with pass-gate (DCVSPG) logic for high-performance digital systems

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 4, 1997, Pages 563-573

  Lai, Fang Shi ^{b,c,d,e,f,g,h,i,j}   Hwang, Wei ^{a,c,d,k,l,m,n,o}  

^a IEEE

^b IBM ALMADEN RESEARCH CENTER   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

^d NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^e NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^f UNIVERSITY OF FLORIDA   (United States)

^g Chinese Army ^*  (China)

^h INTERSIL CORPORATION   (United States)

ⁱ IBM   (United States)

^j EPIC Design Technology Inc   (United States)

^k NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^l UNIVERSITY OF MANITOBA   (Canada)

^m National Chiao Tung University ^*  (United States)

ⁿ Gina Cody School of Engineering and Computer Science   (Canada)

^o AMERICAN PHYSICAL SOCIETY   (United States)

more..

Author keywords

CMOS digital integrated circuits; Complete logic family; High speed circuits; MOSFET logic devices

Indexed keywords

BUFFER CIRCUITS; CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; ELECTRIC SWITCHES; LOGIC DESIGN; LOGIC GATES; MOSFET DEVICES; OPTIMIZATION; RECURSIVE FUNCTIONS;

CMOS TECHNOLOGY; COMPLIMENTARY PASS TRANSISTOR LOGIC; DIFFERENTIAL CASCODE VOLTAGE SWITCH; DOUBLE PASS TRANSISTOR LOGIC; FLOATING NODE PROBLEM; HIGH PERFORMANCE DIGITAL SYSTEMS; HIGH SPEED CIRCUITS; PASS GATE LOGIC TREE; RECURSIVE KARNAUGH MAP; VITERBI MACRO DESIGN;

LOGIC CIRCUITS;

EID: 0031119401     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.563678     Document Type: Article

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