Critical area extraction for soft fault estimation

IEEE Transactions on Semiconductor Manufacturing

Volumn 11, Issue 1, 1998, Pages 146-154

  Allan, Gerard A ^a,b   Walton, Anthony J ^a,b  

^a IEEE   (United Kingdom)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

Critical area; Defects; IC layout; Reliability; Soft faults; Survey sampling; VLSI; Yield estimation

Indexed keywords

ALGORITHMS; CAPACITORS; DEFECTS; DIELECTRIC MATERIALS; FAILURE ANALYSIS; MATHEMATICAL MODELS; RELIABILITY; SAMPLING; SENSITIVITY ANALYSIS; VLSI CIRCUITS;

CRITICAL AREA EXTRACTION; EDINBURGH YIELD ESTIMATOR; SOFT FAULT ESTIMATION; YIELD ENHANCEMENT TECHNIQUE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0031996656     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.661294     Document Type: Article

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