Integration of DFM techniques and design automation

IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 1996, Pages 59-67

  Waring, Thomas G ^a   Allan, Gerard A ^a   Walton, Anthony J ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; ELECTRIC FAULT CURRENTS; MASKS; SEMICONDUCTOR DEVICE MODELS;

DESIGN FOR MANUFACTURABILITY (DFM); VERY HIGH SPEED INTEGRATED CIRCUIT (VHSIC); VHSIC HARDWARE DESCRIPTION LANGUAGE (VHDL);

INTEGRATED CIRCUIT LAYOUT;

EID: 0030392136     PISSN: 10636722     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (23)