Testing core-based systems: A symbolic methodology

IEEE Design and Test of Computers

Volumn 14, Issue 4, 1997, Pages 69-77

  Ferrandi, Fabrizio ^a,c   Fummi, Franco ^a,c   Sciuto, Donatella ^a,c,d,e,f   Macii, Enrico ^b,c,e,g   Poncino, Massimo ^b,c,e  

^a POLITECNICO DI MILANO   (Italy)

^b POLITECNICO DI TORINO   (Italy)

^c IEEE   (United States)

^d UNIVERSITY OF BRESCIA   (Italy)

^e UNIVERSITY OF COLORADO   (United States)

^f BOCCONI UNIVERSITY   (Italy)

^g UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; DECISION TABLES; ERROR DETECTION; FINITE AUTOMATA; INTELLECTUAL PROPERTY; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; RELIABILITY; SYSTEMS ANALYSIS; VLSI CIRCUITS;

BINARY DECISION DIAGRAMS; CORE BASED DESIGN; TEST PATTERN GENERATION; TESTABILITY ESTIMATION;

INTEGRATED CIRCUIT TESTING;

EID: 0031251030     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.632883     Document Type: Article

References (10)

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