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Volumn , Issue , 1996, Pages 444-449
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BDD-based testability estimation of VHDL designs
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
CIRCUIT THEORY;
COMPUTER TESTING;
ESTIMATION;
FAILURE ANALYSIS;
LOGIC GATES;
MATHEMATICAL MODELS;
SPECIFICATIONS;
SYSTEMS ANALYSIS;
CONTROL ORIENTED COMPLEX DESIGN;
GATE LEVEL IMPLEMENTATION;
TESTABILITY ESTIMATION;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
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EID: 0029747885
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (23)
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