A 3.2 GFLOPS Neural Network Accelerator

IEICE Transactions on Electronics

Volumn E80-C, Issue 7, 1997, Pages 859-866

  Komori, Shinji ^a   Arima, Yutaka ^a   Kondo, Yoshikazu ^b   Tsubota, Hirono ^a   Tanaka, Ken Ichi ^a   Kyuma, Kazuo ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b KOBE UNIVERSITY   (Japan)

Author keywords

LSI; Neural network; Parallel processing; SIMD

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; LSI CIRCUITS; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS;

NEURAL NETWORK ACCELERATORS;

NEURAL NETWORKS;

EID: 0031187267     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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