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Volumn , Issue , 1990, Pages 537-544
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A VLSI architecture for high-performance, low-cost, on-chip learning
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
COMPUTER PROGRAMMING - ALGORITHMS;
LEARNING SYSTEMS;
NEURAL NETWORKS;
NEUROCOMPUTING;
ON-CHIP LEARNING;
INTEGRATED CIRCUITS, VLSI;
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EID: 0025532312
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ijcnn.1990.137621 Document Type: Conference Paper |
Times cited : (147)
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References (7)
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