|
Volumn 14, Issue 3, 1992, Pages 248-259
|
The ring array processor: A multiprocessing peripheral for connectionist applications
a a a a a a |
Author keywords
[No Author keywords available]
|
Indexed keywords
COMPUTER ARCHITECTURE;
INFORMATION THEORY - DIGITAL SIGNALS;
LOGIC DEVICES - GATES;
SIGNAL PROCESSING - DIGITAL TECHNIQUES;
SPEECH - RECOGNITION;
CONTINUOUS SPEECH RECOGNITION TRAINING ALGORITHMS;
ERROR BACK PROPAGATION ALGORITHM;
LOW LATENCY RING INTERCONNECTION SCHEME;
MULTI DIGITAL SIGNAL PROCESSOR;
PROGRAMMABLE GATE ARRAY TECHNOLOGY;
RING ARRAY PROCESSOR;
NEURAL NETWORKS;
|
EID: 0026824973
PISSN: 07437315
EISSN: None
Source Type: Journal
DOI: 10.1016/0743-7315(92)90067-W Document Type: Article |
Times cited : (40)
|
References (28)
|