Digital neuroprocessor using quantizer neurons

1993 Symposium on VLSI Circuits Digest of Technical Papers

Volumn , Issue , 1993, Pages 35-36

  Nakahira, Hiroyuki ^a   Sakiyama, Shiro ^a   Maruyama, Masakatsu ^a   Hasegawa, Kenichi ^a   Kouda, Toshiyuki ^a   Maruno, Susumu ^a   Shimeki, Yasuharu ^a   Satonaka, Takami ^a   Nagano, Yoshihisa ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE;

CHIP PERFORMANCE; DIGITAL NEUROPROCESSOR; MULTI-FUNCTIONAL LAYERED NETWORK (MFLN) MODEL; NEURAL NETWORK MODEL; QUANTIZER NEURONS (QN);

NEURAL NETWORKS;

EID: 0027852162     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)