A branch-and-bound method for the optimal scheduling

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1992, Pages

  Ohm, Seong Yong ^a   Jhon, Chu Shik ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BRANCH AND BOUNDS; CANDIDATE NODES; CPU TIME; DATA PATHS; HARDWARE COST; HIGH LEVEL SYNTHESIS; ITERATION STEP; LOWER BOUND ESTIMATION; MULTIPLE OPERATIONS; OPTIMAL SCHEDULING; RE-SCHEDULING PROCESS; RUNTIMES; SCHEDULING PROBLEM; SEARCH SPACES; TIMING CONSTRAINTS;

ALGORITHMS; INTEGRATED CIRCUITS; ITERATIVE METHODS; OPTIMIZATION; TIMING CIRCUITS;

SCHEDULING;

EID: 84870042682     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.1992.591165     Document Type: Conference Paper

References (6)

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2. B. M. Pangrle and D. D. Gajski, "State Synthesis and Connectivity Binding for Microarchitecture Compilation", Proc. ICCAD-86, pp.210-213, November 1986.
3. E. F. Girczyc and J. P. Knight, "An ADA to Standarsd Cell Hardware Compiler based on Graph Grammar and Scheduling", Proc. ICCD-84, pp.726-731, October 1984.
4. P. G. Paulin and J. P. Knight, "Force-directed Scheduling in Automated Data Path Synthesis", Proc. 24th DAC, pp.195-202, June 1987.
5. J. H. Lee, and Y. C. Hsu, and Y. L. Lin, "A New Integer Linear Programming Formulation for the Scheduling Problem in Data Path Synthesis", Proc. ICCAD-89, pp.20-23, November 1989.
6. N. Park and A. C. Park, "SEHWA: A Program for Synthesis of Pipelines", Proc. 23rd DAC, pp.454-460, June 1986.