A neural network for detection of signals in communication

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 43, Issue 8, 1996, Pages 644-655

  Bang, Sa H ^a   Sheu, Bing J ^a  

^a University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL MATHEMATICS; COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; CONVERGENCE OF NUMERICAL METHODS; DIGITAL COMMUNICATION SYSTEMS; FUNCTIONS; LYAPUNOV METHODS; OPTIMIZATION; PARAMETER ESTIMATION; REAL TIME SYSTEMS; SIGNAL DETECTION;

COMBINATORIAL MINIMIZATION; DETECTION COST; LYAPUNOV FUNCTION; MAXIMUM LIKELIHOOD SEQUENCE ESTIMATION;

NEURAL NETWORKS;

EID: 0030216743     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.526680     Document Type: Article

References (34)

1. G. D. Forney, Jr., "Maximum-likelihood sequence estimation of digital sequences in the presence of intersymbol interference," IEEE Trans. Inform. Theoty, vol. 18, pp. 363-378, May 1972.
2. J. G. Proakis, Digital Communications New York: McGraw-Hill, 1983.
3. P. G. Gulak and E. Shewdyk, "VLSI structures for Viterbi receivers: Part 1-General theory and applications," IEEE J. Select. Areas Commun., vol. 4, pp. 142-154, Jan. 1986.
4. P. G, Gulak and T. Kailath. "Locally connected VLSI architectures for the Viterbi algorithm," IEEE J. Select. Areas Commun., vol. 6, pp. 527-537, Apr. 1988.
5. G. Fettweis and H. Meyr, "High-rate Viterbi processor: A systolic array solution," IEEE J. Select. Areas Commun., vol. 8, pp. 1520 1534, Oct. 1990.
6. G. Zeug, D. Hush, and N. Ahined, "An application of neural net in decoding error-correcting codes," in Proc. IEEE 1m. Symp. Circuits Syst., 1989, pp. 782-785.
7. 3. Brück and M. Blaum, "Neural networks, error-correcting codes, and polynomials over the binary n-cube," IEEE Trans. Inform. Theory, vol. 35,'pp. 976-987, Sept. 1989.
8. D. W. Ruck el ul, "The multilayer perceptron as an approximation to a Bayes optimal discriminant function," IEEE Trans. Neural Networks, vol. 1, pp. 296-298, Dec. 1990.
9. J. Choi, S. H. Bang, and B. J. Sheu, "A programmable analog VLSI neural network processor for communication receivers," IEEE Trans. Neural Networks, vol. 4, pp. 484-495. May 1993.
10. S. Chen, B. Mulgrew, and P. M. Grant, "A clustering technique for digital communications channel equalization using radial basis function networks," IEEE Trans. Neural Networks, vol. 4, pp. 570-579, July 1993.
11. T. P. Troudet and S. M. Walters. "Neural network architecture for crossbar switch control," IEEE Trans. Circuits Sysl., vol. 38, pp. 42-56, Jan. 1991.
12. A. Hiramatsu, "Integration of ATM call admission control and link capacity control by distributed neural networks," IEEE J. Select. Areas Commun., vol. 9, pp. 1131-1138, Sept. 1991.
13. D. Kunz, "Channel assignment for cellular radio using neural networks," IEEE Trans. Vehic. Techno!., vol. 40, pp. 188-193, Feb. 1991.
14. L. O. Chua and L. Yang, "Cellular neural networks: Theory," IEEE Trans. Circuits Syst., vol. 35, pp. 1257-1272, Oct. 1988.
15. _, "Cellular neural networks: Application," IEEE Trans. Circuits Syst.. vol. 35, pp. 1273-1290, Oct. 1988.
16. T. Roska and J. Vandewalle, Eds., Cellular Neural Networks. West Sussex, England: Wiley, 1993.
17. J. J. Hopfield, "Neurons with graded response have collective computational properties like those of two-state neurons," in Proc. Nat. Acad. Sei., 1984, vol. 81, pp. 3088-3092.
18. J. J. Hopfield and D. W. Tank, "'Neural' computation of decisions in optimization problems," Biol. Cybern., vol. 52, pp. 141-152, 1985.
19. D. W. Tank and J. J. Hopfield, "Simple 'neural' optimization networks: An A/D converter, signal decision circuit, and a linear programming circuit," IEEE Trans. Circuits Syst., vol. 33, pp. 533-541, May 1986.
20. D. Kunz, "Suboptimum solutions obtained by the Hopfield-Tank neural network algorithm," Biol. Cybern., vol. 65, pp. 129-133, 1991.
21. B. W. Lee and B. J. Sheu, ''Modified Hopfield neural networks for retrieving the optimal solution," IEEE Tratst. Neural Networks, vol. 2, pp. 137-142, Jan. 1991.
22. _, "Parallel hardware annealing for optimal solutions on electronic neural networks," IEEE Trans. Neural Networks, vol. 4, pp. 588-598, July 1993.
23. S. H. Bang, B. J. Sheu, and T. H. Wu, "Optimal solutions for cellular neural networks by paralleled hardware annealing," IEEE Trans. Neural Networks, vol. 7, pp. 440-454, Mar. 1996.
24. S. Haykin, Adaptive Filter Theory, 2nd ed. Englewood Cliffs, NJ: Prentice Hall. 1991.
25. G. A. Tagliarini, J. F. Christ, and E. W. Page, "Optimization using neural networks," IEEE Trans. Comput., vol. 40, pp. 1347-1358, Dec. 1991.
26. Y. Takefuji and K. C. Lee, "Artificial neural networks for four-coloring map problems and K-colorability problems," IEEE Trans. Circuits Syst., vol, 38, pp. 326-333, Mar. 1991.
27. G. V. Wilson and G. S. Pawley, "On the stability of the traveling salesman problem algorithm of Hopfield and Tank," Biol. Cybern., vol. 58, pp. 63-70, 1988.
28. J.-S. Yih and P. Mazumder, "A neural network design for circuit partitioning," IEEE Trans. Computer-Aided Design, vol. 9, pp. 1265-11271, Dec. 1990.
29. P. M. Pardalos and J. B. Rosen, Constrained Global Optimization: Algorithms and Applications Berlin, Germany: Springer-Verlag, 1987.
30. M. Ismail, S. V. Smith, and R. G. Beale, "A new MOSFET-C universal filter structure for VLSI." IEEE J. Solid-State Circuits, vol. 23. pp. 183-194, Feb. 1988.
31. I.. Mirsky, An Introduction to Linear Algebra. New York: Dover, 1990.
32. Z. Czaraul, "Novel MOS resistive circuit for synthesis of fully integrated continuous-time filters," IEEE Trans. Circuits Syst., vol. 33, pp. 718-721, July 1986.
33. G. Nicollini, P. Confalouieri, and D. Senderowicz. "A fully differential sample-and-hold circuit for high-speed applications," IEEEJ. Solid-State Circuits, vol. 24, pp. 1461-1465, Oct. 1989.
34. M. Yotsuyanagi, T. Etoh, and K. Hirata, "A 10-b 50-MHz pipelined CMOS A/D converter with S/H," IEEE J. Solid-State Circuits, vol. 28, pp. 292-300, Mar. 1993.