Optimal solutions for cellular neural networks by paralleled hardware annealing

IEEE Transactions on Neural Networks

Volumn 7, Issue 2, 1996, Pages 440-454

  Bang, Sa H ^a,b   Sheu, Bing J ^a,b   Wu, Tony H Y ^a,b  

^a IEEE

^b University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; COMPUTER HARDWARE; DIGITAL COMPUTERS; EIGENVALUES AND EIGENFUNCTIONS; GRAPH THEORY; IMAGE PROCESSING; OPTIMIZATION; PATTERN RECOGNITION; PROBLEM SOLVING; SIMULATED ANNEALING;

BOLTZMAN MACHINE TECHNIQUE; GRAPH PARTITIONING TECHNIQUE; HOPFIELD NETWORK; MAXIMUM LIKELIHOOD SEQUENCE ESTIMATION; MEAN FIELD LEARNING METHOD; PARALLELED HARDWARE ANNEALING; PREDETERMINED COOLING SCHEDULE;

CELLULAR NEURAL NETWORKS;

EID: 0030106039     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/72.485679     Document Type: Article

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