Variable threshold-voltage CMOS technology

IEICE Transactions on Electronics

Volumn E83-C, Issue 11, 2000, Pages 1705-1714

  Kuroda, Tadahiro ^a   Fujita, Tetsuya ^b   Hatcri, Fumitoshi ^b   Sakurai, Takayasu ^c  

^a KEIO UNIVERSITY   (Japan)

^b TOSHIBA CORPORATION   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

Author keywords

Low power CMOS design; Low voltage; Substrate bias; Threshold voltage

Indexed keywords

EID: 0000957831     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (21)

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