Design impact of positive temperature dependence of drain current in sub 1V CMOS VLSI's

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1999, Pages 563-566

  Kanda, Kouichi ^a   Nose, Kouichi ^a   Kawaguchi, Hiroshi ^a   Sakurai, Takayasu ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; MOSFET DEVICES; THRESHOLD VOLTAGE; VLSI CIRCUITS;

DRAIN CURRENT; POSITIVE TEMPERATURE DEPENDENCE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0032597724     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (6)