Substrate noise influence on circuit performance in variable threshold-voltage scheme

IEEE Symposium on Low Power Electronics

Volumn , Issue , 1996, Pages 309-312

  Kuroda, Tadahiro ^a   Fujita, Tetsuya ^a   Mita, Shinji ^a   Mori, Toshiaki ^a   Matsuo, Kenji ^a   Kakumu, Masakazu ^a   Sakurai, Takayasu ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC POWER SUPPLIES TO APPARATUS; ENERGY DISSIPATION; LINEAR INTEGRATED CIRCUITS; LOGIC GATES; SPURIOUS SIGNAL NOISE; SUBSTRATES;

ACTIVE POWER DISSIPATION; DISCRETE COSINE TRANSFORMS; QUIESCENT POWER SUPPLY CURRENTS; SUBSTRATE BIAS CONTROL; SUBSTRATE NOISE; VARIABLE THRESHOLD VOLTAGE METHOD;

POWER ELECTRONICS;

EID: 0030403621     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)