A NEW SCALABLE DSP ARCHITECTURE FOR SYSTEM ON CHIP (SOC) DOMAINS

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 4, Issue , 1999, Pages 1945-1948

  Weiss, Matthias H ^a   Engel, Frank ^a   Fettweis, Gerhard P ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DIGITAL SIGNAL PROCESSING; DIGITAL SIGNAL PROCESSORS; PROGRAMMABLE LOGIC CONTROLLERS; REQUIREMENTS ENGINEERING; SEMICONDUCTOR DEVICE MANUFACTURE;

COMPLETE SYSTEM; DATA PATHS; EMBEDDINGS; EXPANDABILITY; PROCESSOR ARCHITECTURES; PROCESSOR CORES; SEMICONDUCTOR TECHNOLOGY; SYSTEM REQUIREMENTS; SYSTEM-ON-CHIP SOLUTIONS; SYSTEMS-ON-CHIP;

SYSTEM-ON-CHIP;

EID: 85056930934     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.1999.758306     Document Type: Conference Paper

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