March tests for word-oriented memories

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1998, Pages 501-508

  Van De Goor, A J ^a   Tlili, I B S ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

Bit oriented memories; Data backgrounds; Fault models; March tests; Memory tests; Word oriented memories

Indexed keywords

BIT-ORIENTED MEMORY; DATA BACKGROUNDS; FAULT MODEL; MARCH TESTS; MEMORY TESTS; WORD-ORIENTED MEMORY;

INTEGRATED CIRCUIT TESTING; ITERATIVE METHODS; TESTING;

RANDOM ACCESS STORAGE;

EID: 84893810610     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655905     Document Type: Conference Paper

References (5)

1. Dekker, R. (1990). "A Realistic Fault Model and Test Algorithms for Static Random Access Memories", IEEE Trans. on computers C-9) (6), pp. 567-572.
2. van de Goor, A.J. (1996) "March LR: A test for Realistic Linked Faults", In Proceedings of the 14th VLSI Test Symposium-1996, pp. 272-280.
3. van de Goor, A.J. (1991). "Testing Semiconductor Memories, Theory and Practice," John Wiley &Sons, Chichester, U.K.
4. Tlili, I.B.S. and van de Goor, A.J. (1997). "Tests for word-oriented memories" Technical Report No. 1-68340-44(1997)08, Delft University Technology, Department of Electrical Engineering, Delft, The Netherlands.
5. Treuer, R.P. and Agarwal V.K. (1993). "Fault Location Algorithms for Repairable Embedded RAMs", In Proceedings of the ITC 1993, pp. 825-834.