Review of DVS techniques to reduce power consumption of digital circuits

2006 4th International Conference on Integrated Power Systems, CIPS 2006

Volumn , Issue , 2006, Pages

  Huerta, S C ^a   Vasic M ^a   De Castro, A ^a   Alou, P ^a   Cobos, J A ^a  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; ELECTRIC POWER UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RECONFIGURABLE HARDWARE; VOLTAGE STABILIZING CIRCUITS;

CLOCK FREQUENCY; COMMERCIAL PRODUCTS; DYNAMIC POWER; POWER CONSUMED; POWER SUPPLY; STATE OF THE ART; SUPPLY VOLTAGES; TRANSMETA;

VOLTAGE SCALING;

EID: 84971457482     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (29)

1. Transmeta's Design guides and Datasheets
2. http://support.intel.comlsupport/processors/mobile/pentiumiii/sb/CS-007509.htm
3. Mobile AMD-K6 Processor Power Supply Design, Application Note
4. Kawaguchi, H.; Shin Y;Sakurai T.: uITRON-LP: PowerConscious Real-Time OS Based on Cooperative Voltage Scaling for Multimedia Applications. IEEE transactions on multimedia, Vol. 7, No. I, February 2005
5. Burd, T.D.;Brodersen, R.W.;Pering AT.;Stratakos AJ.: A Dynamic Voltage Scaled Microprocessor System. IEEE journal of solid-state circuits, vol. 35, No. 11, Nov. 2000
6. http://www.intel.comldesignlintarchlpapers/ddl486.htm
7. Choi, K.; Soma, R.; Pedram, M.: Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times. IEEE transactions on computer-aided design of integrated circuits and systems, vol. 24, No. 1, Jan. 2005
8. Gruian, F.: Energy-Efficient Scheduling for Hard Real-Time Applications on Dynamic Voltage Supply Processors. Euro. Summer School on Embedded Systems, Sweden, 2003
9. Saewong S.; Rajkumar R.: Practical Voltage-Scaling for Fixed-Priority RT-Systems. Proc.of the 9th IEEE Real-Time and Embedded Techn. and Applications Symposium (RT AS '03) 2003 IEEE, 2003
10. Kim W.; Kim J.; Min S.: A dynamic voltage scaling algorithm for dynamic-priority hard real-time systems using slack time analysis. Proceedings of the Design Automation and Test in Europe (DA TE'02), 2002
11. Contreras G.; Martonosi M.: Power prediction for intel XScale® processors using performance monitoring unit events. Proceedings of the international symposium on Low power electronics and design, 2005
12. AbouGhazaleh N.; Moss'e D.; Childers B.; Melhem R.; Craven M.: Collaborative Operating System and Compiler Power Management for Real-Time Applications. Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'03), 2003
13. Son D.;Yu c.; Kim H.: Dynamic Voltage Scaling on MPEG Decoding,ICPADS, 2001
14. Evaluation Board Manual, Ultra-low Power Intel486™ SX Processor
15. http://developer.intel.comldesignlintarchlpapers/ddl486.htm
16. Intel® PXA250 and PXA210 Applications Processors. Electrical and Thermal Specification
17. Guthaus M. R.; Ringenberg J. S.;Ernst D.; Austin T. M; Mudge T.; Brown R. B.: MiBench: A free, commercially representative embedded benchmark suite. IEEE 4th Annual Workshop on Workload Characterization, December 2001
18. Soto A; Alou P.; Cobos J.A; Uceda J.: The future DC-DC converter as an enabler of low energy consumption systems with dynamic voltage scaling. IECON 02, vol. 4
19. Trescases O.;. Ng W.T.: Variable output, soft-switching DC/DC converter for VLSI dynamic voltage scaling power supply applications. PESC04. IEEE 35th Annual, June 2004
20. Dhar S., Maksimovic D: Switching Regulator with Dynamically Adjustable Supply Voltage for Low Power VLSI. Ind. Elec. Conference IECON'OI, 2001
21. Soto A;Alou P.; Cobos J.A: Design Methodology for Dynamic Voltage Scaling in the Buck Converter. APEC '05.Twentieth Annual IEEE, vol. I, March 2005
22. Soto A; Castro A; Alou P.; Cobos J.A.; Uceda J.; Lotfi A: Analysis of the Buck Converter for Scaling the Supply Voltage of Digital Circuits, APEC '03, Eighteen Annual IEEE, vol. 2, February 2003.
23. Snowdon D.; Ruocco S.; Heiser G.: Power Management and Dynamic Voltage Scaling: Myths and Facts. Proc. of the 2005 Workshop on Power Aware Real-time Computing
24. Fan x.; Ellis C.S.; Lebeck AR.: Synergy between Power aware Memory Systems and Processor Voltage Scaling. Proceedings of PACS'03, December 2003
25. Miyoshi A; Lefurgy C.; Hensbergen E.; Rajamony R.; Rajkumar R.: Critical Power Slope: Understanding the Runtime Effects of Freq. Scaling. Proc. of the 16th Annual ACM International Conference Supercomputing, 2002
26. Elgharbawy W.M.; Bayoumi M.A: Leakage sources and possible solutions in nanometer CMOS technology. Circuits and Systems Magazine, 2005
27. Jejurikar R.; Pereira C. ;Gupta R.: Leakage aware dynamic voltage scaling for real-time embedded systems. Proceedings of the Design Automation Conference, 2004.
28. Shang L.; Peh L.S.; Jha N.K.: Power-efficient interconnection networks: Dynamic Voltage Scaling with links. Computer Architecture Letters, May 2002.
29. http://www.intel.com/business/bss/products/server/dual-core.htm