Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 1, 2005, Pages 18-28

  Choi, Kihwan ^a,b   Soma, Ramakrishna ^b   Pedram, Massoud ^b  

^a SAMSUNG Electronics   (South Korea)

^b University of Southern California   (United States)

Author keywords

Dynamic voltage and frequency scaling (DVFS); Energy and performance tradeoff; Energy minimization; Low power

Indexed keywords

COMPUTER OPERATING SYSTEMS; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; MICROPROCESSOR CHIPS; NATURAL FREQUENCIES; PUBLIC POLICY;

DYNAMIC VOLTAGE AND FREQUENCY SCALING (DVFS); ENERGY AND PERFORMANCE TRADEOFF; ENERGY MINIMIZATION; LOW POWER;

EMBEDDED SYSTEMS;

EID: 11844285622     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.839485     Document Type: Conference Paper

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