Calibration of open interconnect yield models

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn 2003-January, Issue , 2003, Pages 26-33

  De Vries, D K ^a   Simon, P L C ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; CHAINS; COPPER; DEFECTS; DESIGN FOR TESTABILITY; FAULT TOLERANCE;

ALUMINUM LINES; DUAL DAMASCENE; OPEN-INTERCONNECT; PRODUCT YIELDS; RANDOM FAILURES; STRONG DEPENDENCES; TEST STRUCTURE; YIELD MODELS;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 84971318124     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TSM.2005.1250092     Document Type: Conference Paper

References (9)

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