Hermes: A fast cross-ISA binary translator with post-optimization

Proceedings of the 2015 IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2015

Volumn , Issue , 2015, Pages 246-256

  Zhang, Xiaochun ^a,b   Guo, Qi ^c   Chen, Yunji ^a,d   Chen, Tianshi ^a   Hu, Weiwu ^a,b  

^a INSTITUTE OF COMPUTING TECHNOLOGY   (China)

^b Loongson Technology Corporation Limited   (China)

^c CARNEGIE MELLON UNIVERSITY   (United States)

^d INSTITUTE OF GEOLOGY AND GEOPHYSICS   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ARM PROCESSORS;

BINARY TRANSLATION; COMPUTING PLATFORM; DATA DEPENDENCE GRAPHS; INSTRUCTION SET ARCHITECTURE; INTERMEDIATE REPRESENTATIONS; PERFORMANCE DEGRADATION; POST OPTIMIZATION; STATE OF THE ART;

COMPUTER ARCHITECTURE;

EID: 84961348789     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CGO.2015.7054204     Document Type: Conference Paper

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