IA-32 execution layer: A two-phase dynamic translator designed to support IA-32 applications on Itanium®-based systems

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 2003-January, Issue , 2003, Pages 191-201

  Baraz, L ^a   Devor, T ^a   Etzion, O ^a   Goldenberg, S ^a   Skaletsky, A ^a   Wang, Yun ^a   Zemach, Y ^a  

^a NONE

Author keywords

Microarchitecture

Indexed keywords

DYNAMIC TRANSLATION; ITANIUM; ITANIUM PROCESSOR; MICRO ARCHITECTURES; MULTIPLE OPERATING SYSTEMS; STREAMING SIMD EXTENSIONS; TECHNICAL CHALLENGES; TWO PHASE;

COMPUTER ARCHITECTURE;

EID: 84944408275     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2003.1253195     Document Type: Conference Paper

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