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Volumn 2015-December, Issue , 2015, Pages 100-109

A Heuristic Algorithm for Deriving Compact Models of Processor Instruction Sets

Author keywords

Algorithm design and analysis; Electronic mail; Encoding; Hamming distance; Heuristic algorithms; Instruction sets; Measurement

Indexed keywords

ALGORITHMS; ARM PROCESSORS; DESIGN; ELECTRONIC MAIL; ENCODING (SYMBOLS); HAMMING DISTANCE; HARDWARE; MEASUREMENTS; SYSTEMS ANALYSIS;

EID: 84959879839     PISSN: 15504808     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ACSD.2015.17     Document Type: Conference Paper
Times cited : (3)

References (25)
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  • 4
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    • Encoding of processor instruction sets with explicit concurrency control
    • November
    • A Mokhov, A Alekseyev, A Yakovlev. "Encoding of processor instruction sets with explicit concurrency control". Computers & Digital Techniques, IET. Volume 5, Pages 427-439. November 2011
    • (2011) Computers & Digital Techniques, IET , vol.5 , pp. 427-439
    • Mokhov, A.1    Alekseyev, A.2    Yakovlev, A.3
  • 5
    • 84906840649 scopus 로고    scopus 로고
    • Design of processors with reconfigurable microarchitecture
    • 20 January 2014
    • A. Mokhov, M. Rykunov, D. Sokolov and A. Yakovlev. "Design of Processors with Reconfigurable Microarchitecture". J. Low Power Electron. Appl. 2014, 4, Pages 26-43. 20 January 2014
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    • A. Mokhov, A. Yakovlev. "Conditional partial order graphs and dynamically reconfigurable control synthesis". Design, Automation and Test in Europe, 2008. DATE08, Pages 1142-1147, 10/03/2008
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  • 9
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  • 21
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    • University of California at Berkeley, Ph.D. Thesis in Engineering
    • T. Villa. "Encoding Problems in Logic Synthesis". University of California at Berkeley, Ph.D. Thesis in Engineering. 1995
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.