-
1
-
-
33646178489
-
Mocha: Modularity in model checking
-
A. J. Hu and M. Y. Vardi, editors, Springer-Verlag
-
R. Alur, T. A. Henzinger, F. Mang, S. Qadeer, S. K. Rajamani, and S. Tasiran. Mocha: Modularity in model checking. In A. J. Hu and M. Y. Vardi, editors, CAV’98, number 1427 in LNCS, pages 521–25. Springer-Verlag.
-
CAV’98, Number 1427 in LNCS
, pp. 521-525
-
-
Alur, R.1
Henzinger, T.A.2
Mang, F.3
Qadeer, S.4
Rajamani, S.K.5
Tasiran, S.6
-
2
-
-
84957077859
-
Combining symbolic model checking with uninterpreted functions for out-of-order processor verification
-
Springer
-
S. Berezin, A. Biere, E. Clarke, and Y. Zhu. Combining symbolic model checking with uninterpreted functions for out-of-order processor verification. In FMCAD’98, number 1522 in LNCS, pages 351–68. Springer, 1998.
-
(1998)
FMCAD’98, Number 1522 in LNCS
, pp. 351-368
-
-
Berezin, S.1
Biere, A.2
Clarke, E.3
Zhu, Y.4
-
3
-
-
0004491861
-
Formal verification of digital circuits using symbolic ternary system models
-
R. Kurshan and E. M. Clarke, editors, New Brunswick, New Jersey, June
-
R. E. Bryant and C.-J. Seger. Formal verification of digital circuits using symbolic ternary system models. In R. Kurshan and E. M. Clarke, editors, Workshop on Computer-Aided Verification, New Brunswick, New Jersey, June 1990.
-
(1990)
Workshop on Computer-Aided Verification
-
-
Bryant, R.E.1
Seger, C.-J.2
-
4
-
-
0002278754
-
Automatic verification of pipelined microprocessor control
-
Springer-Verlag
-
J. R. Burch and D. L. Dill. Automatic verification of pipelined microprocessor control. In Computer-Aided Verification (CAV’94). Springer-Verlag, 1994.
-
(1994)
Computer-Aided Verification (CAV’94)
-
-
Burch, J.R.1
Dill, D.L.2
-
5
-
-
85050550846
-
Abstract interpretation: A unified lattice model for static analysis of programs by construction or approximation of fixpoints
-
ACM Press
-
P. Cousot and R. Cousot. Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints. In 4th POPL, pages 238–252. ACM Press, 1977.
-
(1977)
4Th POPL
, pp. 238-252
-
-
Cousot, P.1
Cousot, R.2
-
6
-
-
84948988996
-
Formal design of 1M-gate ASICs
-
Springer
-
A. Eiriksson. Formal design of 1M-gate ASICs. In FMCAD’98, number 1522 in LNCS, pages 49–63. Springer, 1998.
-
(1998)
FMCAD’98, Number 1522 in LNCS
, pp. 49-63
-
-
Eiriksson, A.1
-
7
-
-
84947942515
-
Automatic datapath abstraction of hardware systems
-
Springer-Verlag
-
R. Hojati and R. K. Brayton. Automatic datapath abstraction of hardware systems. In CAV’95, number 939 in LNCS, pages 98–113. Springer-Verlag, 1995.
-
(1995)
CAV’95, Number 939 in LNCS
, pp. 98-113
-
-
Hojati, R.1
Brayton, R.K.2
-
8
-
-
84957627890
-
Verification using uninterpreted functions and finite instantiations
-
LNCS, Springer
-
R. Hojati, A. Isles, D. Kirkpatrick, and R. K. Brayton. Verification using uninterpreted functions and finite instantiations. In FMCAD’96, volume 1166 of LNCS, pages 218–32. Springer, 1996.
-
(1996)
FMCAD’96
, vol.1166
, pp. 218-232
-
-
Hojati, R.1
Isles, A.2
Kirkpatrick, D.3
Brayton, R.K.4
-
9
-
-
0030211668
-
Better verification through symmetry
-
Aug
-
C. Ip and D. Dill. Better verification through symmetry. Formal Methods in System Design, 9(1-2):41–75, Aug. 1996.
-
(1996)
Formal Methods in System Design
, vol.9
, Issue.1-2
, pp. 41-75
-
-
Ip, C.1
Dill, D.2
-
10
-
-
0029486985
-
Efficient validity checking for processor verification
-
R. B. Jones, D. L. Dill, and J. R. Burch. Efficient validity checking for processor verification. In ICCAD’95, 1995.
-
(1995)
ICCAD’95
-
-
Jones, R.B.1
Dill, D.L.2
Burch, J.R.3
-
12
-
-
0004162205
-
-
Tecnical report CMU-CS-93-178, CMU School of Comp. Sci., July, Ph.D. Thesis
-
D. E. Long. Model checking, abstraction, and compositional verification. Tecnical report CMU-CS-93-178, CMU School of Comp. Sci., July 1993. Ph.D. Thesis.
-
(1993)
Model Checking, Abstraction, and Compositional Verification
-
-
Long, D.E.1
-
13
-
-
84863924303
-
Verification of an implementation of tomasulo’s algorithm by compositional model checking
-
Springer-Verlag
-
K. L. McMillan. Verification of an implementation of tomasulo’s algorithm by compositional model checking. In CAV’98, number 1427 in LNCS, pages 100–21. Springer-Verlag, 1998.
-
(1998)
CAV’98, Number 1427 in LNCS
, pp. 100-121
-
-
McMillan, K.L.1
-
14
-
-
84863960247
-
Formal verification of out-of-order execution using incremental flushing
-
LNCS, Springer-Verlag
-
J. U. Skakkabaek, R. B. Jones, and D. L. Dill. Formal verification of out-of-order execution using incremental flushing. In CAV’98, number 1427 in LNCS, pages 98–109. Springer-Verlag, 1998.
-
(1998)
CAV’98
, vol.1427
, pp. 98-109
-
-
Skakkabaek, J.U.1
Jones, R.B.2
Dill, D.L.3
-
15
-
-
0003081830
-
An efficient algorithm for exploiting multiple arithmetic units
-
Jan
-
R. M. Tomasulo. An efficient algorithm for exploiting multiple arithmetic units. IBM J. of Research and Development, 11(1):25–33, Jan. 1967.
-
(1967)
IBM J. Of Research and Development
, vol.11
, Issue.1
, pp. 25-33
-
-
Tomasulo, R.M.1
-
17
-
-
84948966443
-
Bit-level abstraction in the verification of pipelined microprocessors by correspondence checking
-
Springer
-
M. Velev and R. E. Bryant. Bit-level abstraction in the verification of pipelined microprocessors by correspondence checking. In FMCAD’98, number 1522 in LNCS, pages 18–35. Springer, 1998.
-
(1998)
FMCAD’98, Number 1522 in LNCS
, pp. 18-35
-
-
Velev, M.1
Bryant, R.E.2
-
18
-
-
85051051500
-
Epressing interesting properties of programs in propositional temporal logic
-
P. Wolper. Epressing interesting properties of programs in propositional temporal logic. In 13th ACM POPL, pages 184–193, 1986.
-
(1986)
13Th ACM POPL
, pp. 184-193
-
-
Wolper, P.1
|