Better verification through symmetry

Formal Methods in System Design

Volumn 9, Issue 1-2, 1996, Pages 41-75

  Norris Ip, C ^a   Dill, David L ^a  

^a Stanford University   (United States)

Author keywords

Cache coherance protocols; Formal verification; Hardware description language; Model checking; Programming language design; Protocol verification; State reduction; Symmetry

Indexed keywords

COMPUTATIONAL LINGUISTICS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER PROGRAMMING LANGUAGES; DATA REDUCTION; HIGH LEVEL LANGUAGES; NETWORK PROTOCOLS; STATE SPACE METHODS;

AUTOMATIC FORMAL VERIFICATION METHODS; CACHE COHERENCE PROTOCOLS; PROTOCOL VERIFICATION;

ALGORITHMS;

EID: 0030211668     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00625968     Document Type: Article

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