Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors

International Journal of High Performance Computing and Networking

Volumn 1, Issue 1-3, 2004, Pages 4-16

  Shao, Zili ^a   Zhuge, Qingfeng ^a   Zhang, Youtao ^a   Sha, Edwin H M ^a  

^a The University of Texas at Dallas   (United States)

Author keywords

DSP; low power; scheduling; VLIW

Indexed keywords

EID: 84951713449     PISSN: 17400562     EISSN: 17400570     Source Type: Journal    
DOI: 10.1504/ijhpcn.2004.007561     Document Type: Article

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