Automated extraction of run-time parameterisable cores from programmable device configurations

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2000-January, Issue , 2000, Pages 153-161

  James Roxby, Philip ^a   Guccione, Steven A ^b  

^a UNIVERSITY OF BIRMINGHAM   (United Kingdom)

^b XILINX INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTERS; LOGIC DEVICES;

AUTOMATED EXTRACTION; FPGA DEVICES; FURTHER WORKS; JBITS SOFTWARE; OVERALL DESIGN; PROGRAMMABLE DEVICES; RECONFIGURABLE; RUN-TIME RECONFIGURABLE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84949795228     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2000.903402     Document Type: Conference Paper

References (14)

1. Guccione, S. A. and Levi, D.: "Run-Time Parameterizable Cores", Field-Programmable Logic and Applications (FPL99), pp 215-222, 1999
2. Guccione, S. A., Levi, D.: "XBI: A java-based interface to FPGA hardware", in John Schewel, editor, Configurable Computing: Technology and Applications, Proc. SPIE 3526, pp 97-102, Bellingham, WA, November 1998
3. Luk, W, Guo, S., Shirazi, N., Zhuang, N.: "A framework for developing parameterised FPGA libraries", Field-Programmable Logic: Smart Applications, New Paradigms and Compilers (FPL96), pp 24-33, 1996
4. Luk, W., McKeever, S.: "Pebble: A language for parameterized and reconfigurable hardware design", Field-Programmable Logic: From FPGAs to Computing Paradigm (FPL98), pp 9-18, 1998
5. S. Gehring, S. Ludwig.: "The Trianus system and its application to custom computing", Field-Programmable Logic: Smart Applications, New Paradigms and Compilers (FPL96), pp 176-184, 1996
6. Lechner, E., Guccione, S. A.: "The Java environment for reconfigurable computing", Field-Programmable Logic and Applications (FPL97), pp 284-293, 1997
7. th Reconfigurable Architecture Workshop, IT Press, Verlag, pp 16-23, 1997
8. Brebner, G.: "An interactive datasheet for the Xilinx XC6200, ", Field-Programmable Logic: From FPGAs to Computing Paradigm (FPL98), pp 401-405, 1998
9. Levi, D., Guccione, S.. "BoardScope: A debug tool for reconfigurable systems", in John Schewel, editor, Configurable Computing: Technology and Applications, Proc. SPIE 3526, pp 239-246, Bellingham, WA, November 1998. SPIE - The International Society for Optical Engineering.
10. Brebner, G.:. "Automatic identification of swappable logic units in XC6200 circuitry", Field-Programmable Logic and Applications (FPL97), pp 173-182, 1997
11. Heron, J and Woods, R. 'Accelerating run-time reconfiguration on custom computing machines', Advanced Signal Processing Algorithms, Architectures and Implementations VIII, invited paper, SPIE Int. Symp. On Optical Science, Engineering and Instrumentation, July 1998, San Diego, USA
12. Chapman, K.: "Constant Coefficient Multipliers for XC4000E", Xilinx App. note XAPP054. http://www.xilinx.com/xapp/xapp054.pdf. December, 1996.
13. Luk, W., Shirazi, N., Cheung, P.: "Compilation tools for run-time reconfigurable designs", IEEE Symposium on FPGAs for Custom Computing Machines (FCCM97), pp 56-65, 1997
14. Brebner, G.: "Automatic identification of swappable logic units in XC6200 circuitry", Field-Programmable Logic and Applications (FPL97), pp 173-182, 1997