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Volumn 1482, Issue , 1998, Pages 401-405

An interactive datasheet for the xilinx XC6200

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; GRAPHICAL USER INTERFACES; JAVA PROGRAMMING LANGUAGE; LOGIC DEVICES; RECONFIGURABLE ARCHITECTURES;

EID: 84948129182     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0055269     Document Type: Conference Paper
Times cited : (2)

References (4)
  • 1
    • 0027641189 scopus 로고
    • Configurable Array Logic Circuits for Computing Network Error Detection Codes
    • Brebner, "Configurable Array Logic Circuits for Computing Network Error Detection Codes," Journal of VLSI Signal Processing, 6, 1993, pp. 101-117.
    • (1993) Journal of VLSI Signal Processing , vol.6 , pp. 101-117
    • Brebner1
  • 3
    • 84949763779 scopus 로고    scopus 로고
    • CHASTE: A Hardware-Software Co-design Testbed for the Xilinx XC6200
    • ITpress Verlag
    • Brebner, "CHASTE: a Hardware-Software Co-design Testbed for the Xilinx XC6200," Proc. 4th Reconfigurable Architecture Workshop, ITpress Verlag, 1997, pp. 16-23.
    • (1997) Proc. 4th Reconfigurable Architecture Workshop , pp. 16-23
    • Brebner1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.