Logic BIST and scan test techniques for multiple identical blocks

Proceedings of the IEEE VLSI Test Symposium

Volumn 2002-January, Issue , 2002, Pages 60-65

  Arabi, K ^a  

^a PMC Sierra Ltd Burnaby   (Canada)

Author keywords

Automatic testing; Built in self test; Circuit testing; Costs; Integrated circuit testing; Logic devices; Logic testing; Manufacturing; Production; Time to market

Indexed keywords

AUTOMATIC TESTING; COSTS; EQUIPMENT TESTING; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; LOGIC DEVICES; MANUFACTURE; PRODUCTION; VLSI CIRCUITS;

AUTOMATIC TEST EQUIPMENT; BIST TECHNIQUES; CIRCUIT TESTING; LOGIC TESTING; PRODUCTION CAPACITY; PRODUCTION TEST; STAND -ALONE; TIME TO MARKET;

BUILT-IN SELF TEST;

EID: 84948415285     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2002.1011112     Document Type: Conference Paper

References (7)

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