Using a complementary emulation-simulation co-design approach to assess application readiness for Processing-in-Memory systems

Proceedings of Co-HPC 2014: 1st International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in Conjunction with SC 2014: The International Conference for High Performance Computing, Networking, Storage and Analysis

Volumn , Issue , 2014, Pages 64-71

  Stelle, George ^a   Olivier, Stephen L ^b   Stark, Dylan ^b   Rodrigues, Arun F ^b   Hemmert, K Scott ^b  

^a University of New Mexico   (United States)

^b SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; COMPUTER ARCHITECTURE; DESIGN; DIGITAL STORAGE; DISTRIBUTED COMPUTER SYSTEMS; ENERGY EFFICIENCY;

APPLICATION ARCHITECTURE; CO-DESIGN APPROACH; COLLABORATIVE RESEARCH; COMPUTER ARCHITECTS; EFFICIENT COMPUTATION; PROCESSING IN MEMORY; PROCESSING-IN-MEMORY SYSTEMS; SIMULATION STUDIES;

HARDWARE-SOFTWARE CODESIGN;

EID: 84946685271     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/Co-HPC.2014.5     Document Type: Conference Paper

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