Improvements to the structural simulation toolkit

SIMUTools 2012 - 5th International Conference on Simulation Tools and Techniques

Volumn , Issue , 2012, Pages 190-195

  Rodrigues, Arun ^a   Bergman, Keren ^b   Bunde, David ^c   Cooper Balis, Elliot ^d   Ferreira, Kurt ^a   Hemmert, K Scott ^a   Barrett, Brian ^a   Versaggi, Cassandra ^c   Hendry, Robert ^b   Jacob, Bruce ^d   Kim, Hyesoon ^e   Leung, Vitus ^a   Levenhagen, Michael ^a   Rasquinha, Mitchelle ^e   Riesen, Rolf ^f   Rosenfeld, Paul ^d   Del Carmen Ruiz Varela, Maria ^g   Yalamanchili, Sudhakar ^e  

^a SANDIA NATIONAL LABORATORIES   (United States)

^b Och Spine at New York Presbyterian Hospitals   (United States)

^c KNOX COLLEGE   (United States)

^d UNIVERSITY OF MARYLAND   (United States)

^e GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^f IBM   (United States)

^g UNIVERSITY OF DELAWARE   (United States)

Author keywords

Architecture; Simulation

Indexed keywords

ARCHITECTURE; COMPLEX NETWORKS; SUPERCOMPUTERS;

ARCHITECTURAL SIMULATION; HIGH PERFORMANCE COMPUTING (HPC); PARALLEL SIMULATIONS; PROCESSOR MODELS; SIMULATION; STRUCTURAL SIMULATIONS; SYSTEM COMPONENTS; THERMAL LIMITS;

NETWORK ARCHITECTURE;

EID: 84922800667     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.4108/icst.simutools.2012.247848     Document Type: Conference Paper

References (29)

1. A. Bakhoda, G. Yuan, W. Fung, H. Wong, and T. Aamodt. Analyzing cuda workloads using a detailed gpu simulator. In Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on, pages 163-174, april 2009.
2. N. L. Binkert, R. G. Dreslinski, L. R. Hsu, K. T. Lim, A. G. Saidi, and S. K. Reinhardt. The m5 simulator: Modeling networked systems. IEEE Micro, 26:52-60, 2006.
3. D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0. SimpleScalar LLC.
4. J. Chan, G. Hendry, A. Biberman, K. Bergman, and L. P. Carloni. Phoenixsim: a simulator for physical-layer analysis of chip-scale photonic interconnection networks. In Proc. of the Conference on Design, Automation and Test in Europe, DATE '10, pages 691-696, 2010.
5. G. Diamos, A. Kerr, S. Yalamanchili, and N. Clark. Ocelot: A dynamic compiler for bulk-synchronous applications in heterogeneo us systems. In PACT-19, pages 353-364, New York, NY, USA, 2010. ACM.
6. J. Duato, S. Yalamanchili, and N. Lionel. Interconnection Networks: An Engineering Approach. Morgan Kaufmann Publishers Inc., San Franciso, CA, USA, 2002.
7. D. Feitelson. The parallel workloads archive. http://www.cs.huji.ac.il/labs/parallel/workload/index.html.
8. H. Fredriksson and C. Svensson. Improvement potential and equalization example for multidrop dram memory buses. IEEE Transaction On Advanced Packaging, 32(3):675-682, 2009.
9. R. M. Fujimoto. Parallel discrete event simulation. In Proceedings of the 21st conference on Winter simulation, WSC '89, pages 19-28, New York, NY, USA, 1989. ACM.
10. T. Henderson, , T. R. Henderson, and S. Roy. ns-3 project goals.
11. S. Krumke, M. Marathe, H. Noltemeier, V. Radhakrishnan, S. Ravi, and D. Rosenkrantz. Compact location problems. Theoretical Computer Science, 181(2):379-404, 1997.
12. V. Leung, E. Arkin, M. Bender, D. Bunde, J. Johnston, A. Lal, J. Mitchell, C. Phillips, and S. Seiden. Processor allocation on Cplant: Achieving general processor locality using one-dimensional allocation strategies. In Proc. 4th IEEE Intern. Conf. on Cluster Computing, pages 296-304, 2002.
13. D. Lifka. The ANL/IBM SP scheduling system. In Proc. 1st Workshop Job Scheduling Strategies for Parallel Processing, number 949 in LNCS, pages 295-303, 1995.
14. A. Lindsay, M. Galloway-Carson, C. Johnson, D. Bunde, and V. Leung. Backfilling with guarantees granted upon job submission. In Proc. 17th Intern. Euro-Par Conf. Parallel Processing, number 6852 in LNCS, pages 142-153, 2011.
15. V. Lo, K. Windisch, W. Liu, and B. Nitzberg. Non-contiguous processor allocation algorithms for mesh-connected multicomputers. IEEE Trans. Parallel and Distributed Systems, 8(7):712-726, 1997.
16. C.-K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood. Pin: Building customized program analysis tools with dynamic instrumentation. In PLDI, 2005.
17. J. Mache, V. Lo, and K. Windisch. Minimizing message-passing contention in fragmentation-free processor allocation. In Proc. 10th IASTED Intern. Conf. Parallel and Distributed Computing and Systems, pages 120-124, 1997.
18. A. W. Mu'alem and D. G. Feitelson. Utilization, predictability, workloads, and user runtime estimates in scheduling the IBM SP2 with backfilling. IEEE Trans. Parallel and Distributed Syst., 12(6):529-543, 2001.
19. D. Nellans, V. K. Kadaru, and E. Brunv. Asim-an asynchronous architectural level simulator abstract.
20. R. E. Riesen, K. T. Pedretti, R. Brightwell, B. W. Barrett, K. D. Underwood, T. B. Hudson, and A. B. Maccabe. The Portals 4.0 message passing interface. Technical Report SAND2008-2639, Sandia National Laboratories, April 2008.
21. A. F. Rodrigues, K. S. Hemmert, B. W. Barrett, C. Kersey, R. Oldfield, M. Weston, R. Risen, J. Cook, P. Rosenfeld, E. CooperBalls, and B. Jacob. The structural simulation toolkit. SIGMETRICS Perform. Eval. Rev., 38:37-42, March 2011.
22. P. Rosenfeld, E. Cooper-Balis, and B. Jacob. Dramsim2: A cycle accurate memory system simulator. IEEE Computer Architecture Letters,, 99(RapidPosts), 2011.
23. A. G. Saidi, N. L. Binkert, L. R. Hsu, and S. K. Reinhardt. Performance validation of network-intensive workloads on a full-system simulator. In First Ann. Workshop on Iteraction between Operating System and Computer Architecture (IOSCA), Oct. 2005.
24. O. Thebe, D. Bunde, and V. Leung. Scheduling restartable jobs with short test runs. In Proc. 14th Workshop Job Scheduling Strategies for Parallel Processing, 2009.
25. R. Ubal, J. Sahuquillo, S. Petit, and P. López. Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. In Proc. of the 19th Int'l Symposium on Computer Architecture and High Performance Computing, Oct. 2007.
26. K. Underwood, M. Levenhagen, and A. Rodrigues. Simulating red storm: Challenges and successes in building a system simulation. In IEEE International Parallel and Distributed Processing Symposium, Long Beach, CA, 2007. IEEE.
27. K. D. Underwood, J. Coffman, R. Larsen, K. S. Hemmert, B. W. Barrett, R. Brightwell, and M. Levenhagen. Enabling flexible collective communication offload with triggered operations. In Proceedings of 19th Annual Symposium on High-Performance Interconnects (HotI), August 2011.
28. A. Varga. Omnet++ discrete event simulation system. http://www.omnetpp.org., 2011.
29. P. Walker, D. Bunde, and V. Leung. Faster high-quality processor allocation. In Proc. 11th LCI Intern. Conf. High-Performance Clustered Computing, 2010.