Gilgamesh: A multithreaded Processor-in-Memory architecture for petaflops computing

Proceedings of the International Conference on Supercomputing

Volumn 2002-November, Issue , 2002, Pages

  Sterling, Thomas L ^a   Zima, Hans P ^a,b  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

^b UNIVERSITY OF VIENNA   (Austria)

Author keywords

Data parallel processing; Irregular applications; Parallel architectures; Petaflops computing; Processor in Memory

Indexed keywords

COMPUTATION THEORY; DATA HANDLING; DYNAMIC RANDOM ACCESS STORAGE; FAULT TOLERANCE; INFORMATION MANAGEMENT; MEMORY ARCHITECTURE; MIDDLEWARE;

DATA PARALLEL; DATA PARALLEL PROCESSING; EXECUTION MODELING; IRREGULAR APPLICATIONS; LOAD-BALANCING; PARALLEL PROCESSING; PETAFLOPS COMPUTING; PROCESSOR-IN-MEMORY; PROCESSOR-IN-MEMORY ARCHITECTURES; PROCESSORS IN MEMORY;

PARALLEL ARCHITECTURES;

EID: 84947207615     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SC.2002.10061     Document Type: Conference Paper

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