Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn 2003-January, Issue , 2003, Pages

  Stockinger, Michael ^a   Miller, James W ^a   Khazhinsky, Michael G ^a   Torres, Cynthia A ^a   Weldon, James C ^a   Preble, Bryan D ^a   Bayer, Martin J ^a   Akers, Matthew ^a   Kamat, Vishnu G ^b  

^a MOTOROLA INC   (United States)

^b SYNOPSYS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTROSTATIC DEVICES;

ADVANCED CMOS; AREA-EFFICIENT; ESD PROTECTION; FALSE TRIGGERING; HIGH RESISTANCE; MOS-FET; RAIL CLAMPS;

ELECTROSTATIC DISCHARGE;

EID: 84945208695     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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