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Volumn , Issue , 2006, Pages 451-454

Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability: A 3-D simulation study

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; GRAIN BOUNDARIES; MOSFET DEVICES; POLYSILICON; STATISTICAL METHODS;

EID: 84943201011     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2006.307735     Document Type: Conference Paper
Times cited : (21)

References (7)
  • 1
    • 0042912833 scopus 로고    scopus 로고
    • Simulation, of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs
    • A. Asenov, A. R. Brown, J. H. Davies, S. Kaya and G. Slavcheva, "Simulation, of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs", IEEE Trans. on Electron Devices, Vol.50, No.9, pp.1837-1852, 2003
    • (2003) IEEE Trans. on Electron Devices , vol.50 , Issue.9 , pp. 1837-1852
    • Asenov, A.1    Brown, A.R.2    Davies, J.H.3    Kaya, S.4    Slavcheva, G.5
  • 2
    • 0033872616 scopus 로고    scopus 로고
    • Polysilicon: Gate Enhancement of the Random Dopant. Induced. Threshold Voltage Fluctuations in Sub 100 nm MOSFETs with Ultrathin Gate Oxide
    • A. Asenov, and S. Saini, "Polysilicon: Gate Enhancement of the Random Dopant. Induced. Threshold Voltage Fluctuations in Sub 100 nm MOSFETs with Ultrathin Gate Oxide" IEEE Trans. on Eleotron Devices, Vol.47, No.4, pp.805-812, 2000
    • (2000) IEEE Trans. on Eleotron Devices , vol.47 , Issue.4 , pp. 805-812
    • Asenov, A.1    Saini, S.2
  • 4
    • 36248961075 scopus 로고    scopus 로고
    • Impact of a single grain boundary in the polycrystalline silicon gate on sub 100nm bulk MOSFET characteristics. - implication on matching properties
    • A. Cathignol, K. Rochereau and G. Ghibaudo, "Impact of a single grain boundary in the polycrystalline silicon gate on sub 100nm bulk MOSFET characteristics. - implication on matching properties", Proc. 7 th European Workshop on Ultimate Integration of Silicon (ULIS), pp.145-148, 2006
    • (2006) Proc. 7 th European Workshop on Ultimate Integration of Silicon (ULIS) , pp. 145-148
    • Cathignol, A.1    Rochereau, K.2    Ghibaudo, G.3
  • 6
    • 84943202392 scopus 로고    scopus 로고
    • ENSERG, Grenoble, France, personal communication, 2005
    • A. Cathignol and G. Ghibaudo, ENSERG, Grenoble, France, personal communication, 2005
    • Cathignol, A.1    Ghibaudo, G.2
  • 7
    • 0442295642 scopus 로고    scopus 로고
    • Improved off-current and subthreshold slope in aggressively scaled poly-si TFTs with a single grain boundary in the channel
    • P. M. Walker, H. Mizuta, S. Uno, Y. Furuta and D. G. Hasko, "Improved off-current and subthreshold slope in aggressively scaled poly-si TFTs with a single grain boundary in the channel", IEEE Trans. on Electron Devices, Vol.51, No.2, pp.212-219, 2004
    • (2004) IEEE Trans. on Electron Devices , vol.51 , Issue.2 , pp. 212-219
    • Walker, P.M.1    Mizuta, H.2    Uno, S.3    Furuta, Y.4    Hasko, D.G.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.