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Volumn 58, Issue , 2015, Pages 144-145
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An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applications
a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ARM PROCESSORS;
ELECTRIC BATTERIES;
ENERGY EFFICIENCY;
SENSOR NODES;
VOLTAGE REGULATORS;
BATTERY OPERATION;
COST PROHIBITIVE;
FULLY INTEGRATED;
LEAKAGE REDUCTION;
PEAK EFFICIENCY;
STATE-RETENTION;
WIRELESS SENSOR NODE;
WSN APPLICATIONS;
CMOS INTEGRATED CIRCUITS;
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EID: 84940734189
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISSCC.2015.7062967 Document Type: Conference Paper |
Times cited : (73)
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References (5)
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