-
1
-
-
28144436750
-
Ambient intelligence: Gigascale dreams and nanoscale realitie
-
Keynote address at the
-
H. De Man, "Ambient intelligence: Gigascale dreams and nanoscale realitie," in IEEE Int. Solid-State Circuits Conf., 2005,Keynote address at the.
-
(2005)
IEEE Int. Solid-State Circuits Conf
-
-
De Man, H.1
-
2
-
-
80052649741
-
The swarm at the edge of the cloud-A new face of wireless
-
J. Rabaey, "The swarm at the edge of the cloud-A new face of wireless," in Proc. Symp. VLSI Circuits, 2011, pp. 6-8.
-
(2011)
Proc. Symp. VLSI Circuits
, pp. 6-8
-
-
Rabaey, J.1
-
3
-
-
79960705343
-
Application-aware LCA of semiconductors: Life-cycle energy of microprocessors from high-Performance 32 nm CPU to ultra-low-power 130 nm MCU
-
D. Bol, S. Boyd, and D. Dornfeld, "Application-aware LCA of semiconductors: Life-cycle energy of microprocessors from high-Performance 32 nm CPU to ultra-low-power 130 nm MCU," in Proc. IEEE Int. Symp. Sustainable Syst. Technol., 2011, 6 p.
-
(2011)
Proc. IEEE Int. Symp. Sustainable Syst. Technol
, pp. 6
-
-
Bol, D.1
Boyd, S.2
Dornfeld, D.3
-
4
-
-
70349632834
-
Life-cycle energy demand and global warming potential of computational logic
-
S. Boyd, A. Horvath, and D. Dornfeld, "Life-cycle energy demand and global warming potential of computational logic," ACS Environmental Sci. Technol., vol. 43, pp. 7303-7309, 2009.
-
(2009)
ACS Environmental Sci. Technol
, vol.43
, pp. 7303-7309
-
-
Boyd, S.1
Horvath, A.2
Dornfeld, D.3
-
5
-
-
84860671642
-
A modular 1 mm die-stacked sensing platform with optical communication and multi-modal energy harvesting
-
Y. Lee, G. Kim, S. Bang, Y. Kim, I. Lee, P. Dutta, D. Sylvester, and D. Blaauw, "A modular 1 mm die-stacked sensing platform with optical communication and multi-modal energy harvesting," in Proc. Int. Solid-State Circuits Conf., 2012, pp. 402-403.
-
(2012)
Proc. Int. Solid-State Circuits Conf
, pp. 402-403
-
-
Lee, Y.1
Kim, G.2
Bang, S.3
Kim, Y.4
Lee, I.5
Dutta, P.6
Sylvester, D.7
Blaauw, D.8
-
6
-
-
79955542202
-
Quantifying carbon footprint reduction opportunities for U.S. households and communities
-
C. Jones and D. Kammen, "Quantifying carbon footprint reduction opportunities for U.S. households and communities," ACS Environmental Sci. Technol., vol. 45, pp. 4088-4095, 2011.
-
(2011)
ACS Environmental Sci. Technol
, vol.45
, pp. 4088-4095
-
-
Jones, C.1
Kammen, D.2
-
7
-
-
84860681254
-
A 25 MHz 7 W/MHz ultralow-voltage microcontroller SoC in 65 nm LP/GP CMOS for low-carbon wireless sensor nodes
-
D. Bol, J. De Vos, C. Hocquet, F. Botman, F. Durvaux, S. Boyd, D. Flandre, and J.-D. Legat, "A 25 MHz 7 W/MHz ultralow-voltage microcontroller SoC in 65 nm LP/GP CMOS for low-carbon wireless sensor nodes," in Proc. Int. Solid-State Circuits Conf., 2012, pp. 490-491.
-
(2012)
Proc. Int. Solid-State Circuits Conf
, pp. 490-491
-
-
Bol, D.1
De Vos, J.2
Hocquet, C.3
Botman, F.4
Durvaux, F.5
Boyd, S.6
Flandre, D.7
Legat, J.-D.8
-
8
-
-
80052682013
-
A configurable and low-power mixed signal SoC for portable ECG monitoring applications
-
H. Kim, R. F. Yazicioglu, S. Kim, N. Van Helleputte, A. Artes, M. Konijnenburg, J. Huisken, J. Penders, and C. Van Hoof, "A configurable and low-power mixed signal SoC for portable ECG monitoring applications," in Proc. Symp. VLSI Circ., 2011, pp. 142-143.
-
(2011)
Proc. Symp. VLSI Circ
, pp. 142-143
-
-
Kim, H.1
Yazicioglu, R.F.2
Kim, S.3
Van Helleputte, N.4
Artes, A.5
Konijnenburg, M.6
Huisken, J.7
Penders, J.8
Van Hoof, C.9
-
9
-
-
79953217746
-
Microwatt embedded processor platform for medical system-on-chip applications
-
Apr.
-
S. Sridhara et al., "Microwatt embedded processor platform for medical system-on-chip applications," IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 721-730, Apr. 2011.
-
(2011)
IEEE J. Solid-State Circuits
, vol.46
, Issue.4
, pp. 721-730
-
-
Sridhara, S.1
-
10
-
-
79955725331
-
A voltage-scalable biomedical signal processor running ECG using 13 pJ/cycle at 1 MHz and 0.4 v
-
M. Ashouei, J. Hulzink, M. Konijnenburg, J. Zhou, F. Duarte, A. Breeschoten, J. Huisken, J. Stuyt, H. de Groot, F. Barat, J. David, and J. Van Ginderdeuren, "A voltage-scalable biomedical signal processor running ECG using 13 pJ/cycle at 1 MHz and 0.4 V," in Proc. Int. Solid-State Circuits Conf., 2011, pp. 332-333.
-
(2011)
Proc. Int. Solid-State Circuits Conf
, pp. 332-333
-
-
Ashouei, M.1
Hulzink, J.2
Konijnenburg, M.3
Zhou, J.4
Duarte, F.5
Breeschoten, A.6
Huisken, J.7
Stuyt, J.8
De Groot, H.9
Barat, F.10
David, J.11
Van Ginderdeuren, J.12
-
11
-
-
77952188483
-
Millimeterscale nearly perpetual sensor system with stacked battery and solar cells
-
G. Chen, M. Fojtik, D. Kim, D. Fick, J. Park, M. Seok, M.-T. Chen, Z. Foo, D. Sylvester, and D. Blaauw, "Millimeterscale nearly perpetual sensor system with stacked battery and solar cells," in Proc. Int. Solid-State Circuits Conf., 2010, pp. 288-289.
-
(2010)
Proc. Int. Solid-State Circuits Conf
, pp. 288-289
-
-
Chen, G.1
Fojtik, M.2
Kim, D.3
Fick, D.4
Park, J.5
Seok, M.6
Chen, M.-T.7
Foo, Z.8
Sylvester, D.9
Blaauw, D.10
-
12
-
-
67649964638
-
A 10-pJ/instruction, 4-MIPS micropowerDSP for sensor applications
-
N. Ickes, D. Finchelstein, and A. Chandrakasan, "A 10-pJ/instruction, 4-MIPS micropowerDSP for sensor applications," in Proc. IEEE Asian Solid-State Circuits Conf., 2008, pp. 289-292.
-
(2008)
Proc. IEEE Asian Solid-State Circuits Conf
, pp. 289-292
-
-
Ickes, N.1
Finchelstein, D.2
Chandrakasan, A.3
-
13
-
-
77952231019
-
A 1 v RF SoC with an 863-to-928 MHz 400 kb/s radio and a 32 b dual-MAC DSP core for wireless sensor and body networks
-
E. Le Roux et al., "A 1 V RF SoC with an 863-to-928 MHz 400 kb/s radio and a 32 b dual-MAC DSP core for wireless sensor and body networks," in Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf., 2010, pp. 464-465.
-
(2010)
Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf
, pp. 464-465
-
-
Le Roux, E.1
-
14
-
-
79955731779
-
An 82 A/MHz microcontroller with embedded FeRAM for energy-harvesting applications
-
M. Zwerg et al., "An 82 A/MHz microcontroller with embedded FeRAM for energy-harvesting applications," in Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf., 2011, pp. 334-335.
-
(2011)
Dig. Tech. Papers. IEEE Int. Solid-State Circuits Conf
, pp. 334-335
-
-
Zwerg, M.1
-
15
-
-
58149234982
-
A 65 nm sub-microcontroller with integrated SRAM and switched-capacitor DC-DC converter
-
Jan
-
J. Kwong, Y. Ramadass, N. Verma, and A. Chandrakasan, "A 65 nm sub-microcontroller with integrated SRAM and switched-capacitor DC-DC converter," IEEE J. Solid-State Circuits, vol. 44, no. 1, pp. 881-891, Jan. 2009.
-
(2009)
IEEE J. Solid-State Circuits
, vol.44
, Issue.1
, pp. 881-891
-
-
Kwong, J.1
Ramadass, Y.2
Verma, N.3
Chandrakasan, A.4
-
16
-
-
70349736169
-
Interests and limitations of technology scaling for subthreshold logic
-
Oct
-
D. Bol, R. Ambroise, D. Flandre, and J.-D. Legat, "Interests and limitations of technology scaling for subthreshold logic," IEEE Trans. Very Large-Scale Integrated (VLSI) Syst., vol. 17, no. 10, pp. 1508-1519, Oct. 2009.
-
(2009)
IEEE Trans. Very Large-Scale Integrated (VLSI) Syst
, vol.17
, Issue.10
, pp. 1508-1519
-
-
Bol, D.1
Ambroise, R.2
Flandre, D.3
Legat, J.-D.4
-
17
-
-
84906727332
-
Robust and energy-efficient ultra-low-voltage circuit design under timing constraints in 65/45 nm CMOS
-
D. Bol, "Robust and energy-efficient ultra-low-voltage circuit design under timing constraints in 65/45 nm CMOS," MDPI J. Low-Power Electron. Applic., vol. 1, no. 1, pp. 1-19, 2011.
-
(2011)
MDPI J. Low-Power Electron. Applic
, vol.1
, Issue.1
, pp. 1-19
-
-
Bol, D.1
-
18
-
-
84964530213
-
-
Mar [Online]. Available: opencore.org
-
O. Girard, "OpenMSP430 Project," Mar. 2010. [Online]. Available: opencore.org
-
(2010)
OpenMSP430 Project
-
-
Girard, O.1
-
19
-
-
85008061014
-
Miniaturized wireless sensing system for real-time breath activity recording
-
Jan.
-
N. Andre et al., "Miniaturized wireless sensing system for real-time breath activity recording," IEEE J. Sensors, vol. 10, no. 1, pp. 178-184, Jan. 2010.
-
(2010)
IEEE J. Sensors
, vol.10
, Issue.1
, pp. 178-184
-
-
Andre, N.1
-
20
-
-
25144514874
-
Modeling and sizing for minimum energy operation in subthreshold circuits
-
Sep/
-
B. Calhoun, A.Wang, and A. Chandrakasan, "Modeling and sizing for minimum energy operation in subthreshold circuits," IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1778-1786, Sep/2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.9
, pp. 1778-1786
-
-
Calhoun, B.1
Wang, A.2
Chandrakasan, A.3
-
21
-
-
62349127176
-
Analysis and minimization of practical energy in 45 nm subthreshold logic circuits
-
D. Bol, R. Ambroise, D. Flandre, and J.-D. Legat, "Analysis and minimization of practical energy in 45 nm subthreshold logic circuits," in Proc. IEEE Int. Conf. Computer Des., 2008, pp. 294-300.
-
(2008)
Proc. IEEE Int. Conf. Computer des
, pp. 294-300
-
-
Bol, D.1
Ambroise, R.2
Flandre, D.3
Legat, J.-D.4
-
22
-
-
4544387565
-
Low Cost 65 nm CMOS platform for low power & general purpose applications
-
F. Arnaud et al., "Low Cost 65 nm CMOS platform for low power & general purpose applications," in Proc. Symp. VLSI Tech., 2004, pp. 10-11.
-
(2004)
Proc. Symp. VLSI Tech
, pp. 10-11
-
-
Arnaud, F.1
-
23
-
-
70449707767
-
Technology flavor selection and adaptive techniques for timing-constrained 45 nm subthreshold circuits
-
D. Bol, D. Flandre, and J.-D. Legat, "Technology flavor selection and adaptive techniques for timing-constrained 45 nm subthreshold circuits," in Proc. ACM Int. Symp. Low-Power Electron. Design, 2009, pp. 21-26.
-
(2009)
Proc. ACM Int. Symp. Low-Power Electron. Design
, pp. 21-26
-
-
Bol, D.1
Flandre, D.2
Legat, J.-D.3
-
24
-
-
85008054031
-
A 256 kb 65 nm 8T subthreshold SRAM employing sense-amplifier redundancy
-
Jan
-
N. Verma and A. Chandrakasan, "A 256 kb 65 nm 8T subthreshold SRAM employing sense-amplifier redundancy," IEEE J. Solid-State Circuits, vol. 43, no. 1, pp. 141-149, Jan. 2008.
-
(2008)
IEEE J. Solid-State Circuits
, vol.43
, Issue.1
, pp. 141-149
-
-
Verma, N.1
Chandrakasan, A.2
-
25
-
-
38849084539
-
A 0.2 V, 480 kb subthreshold SRAM with 1 k cells per bitline for ultra-low-voltage computing
-
DOI 10.1109/JSSC.2007.914328
-
T.-H. Kim, J. Liu, J. Keane, and C. Kim, "A 0.2 V, 480 kb subthreshold SRAM with 1 k cells per bitline for ultra-low-voltage computing," IEEE J. Solid-State Circuits, vol. 43, no. 2, pp. 518-529, Feb. 2008. (Pubitemid 351190219)
-
(2008)
IEEE Journal of Solid-State Circuits
, vol.43
, Issue.2
, pp. 518-529
-
-
Kim, T.-H.1
Liu, J.2
Keane, J.3
Kim, C.H.4
-
26
-
-
59349118349
-
A 32 kb 10 T sub-threshold SRAM array with bit-interleaving and differential read scheme in 90 nm CMOS
-
Feb
-
I. J. Chang, J.-J. Kim, S. P. Park, and K. Roy, "A 32 kb 10 T sub-threshold SRAM array with bit-interleaving and differential read scheme in 90 nm CMOS," IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 650-658, Feb. 2009.
-
(2009)
IEEE J. Solid-State Circuits
, vol.44
, Issue.2
, pp. 650-658
-
-
Chang, I.J.1
Kim, J.-J.2
Park, S.P.3
Roy, K.4
-
27
-
-
33847724635
-
A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation
-
DOI 10.1109/JSSC.2006.891726
-
B. Calhoun and A. Chandrakasan, "A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation," IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 680-688, Mar. 2007. (Pubitemid 46376044)
-
(2007)
IEEE Journal of Solid-State Circuits
, vol.42
, Issue.3
, pp. 680-688
-
-
Calhoun, B.H.1
Chandrakasan, A.P.2
-
28
-
-
78650361041
-
The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic
-
D. Bol, C. Hocquet, D. Flandre, and J.-D. Legat, "The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic," in Proc. IEEE European Solid-State Res. Circuits Conf., 2010, pp. 522-525.
-
(2010)
Proc. IEEE European Solid-State Res. Circuits Conf
, pp. 522-525
-
-
Bol, D.1
Hocquet, C.2
Flandre, D.3
Legat, J.-D.4
-
29
-
-
84861521565
-
Pushing adaptive voltage scaling fully on chip
-
J. De Vos, D. Flandre, and D. Bol, "Pushing adaptive voltage scaling fully on chip," ASP J. Low-Power Electron., vol. 8, pp. 95-105, 2012.
-
(2012)
ASP J. Low-Power Electron
, vol.8
, pp. 95-105
-
-
De Vos, J.1
Flandre, D.2
Bol, D.3
-
30
-
-
41549084662
-
Exploring variability and performance in a sub-200-mV processor
-
Apr
-
S. Hanson et al., "Exploring variability and performance in a sub-200-mV processor," IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 115-126, Apr. 2009.
-
(2009)
IEEE J. Solid-State Circuits
, vol.43
, Issue.4
, pp. 115-126
-
-
Hanson, S.1
-
31
-
-
0034315851
-
Dynamic voltage scaled microprocessor system
-
DOI 10.1109/4.881202
-
T.Burd, T. Pering,A.Stratakos, andR. Brodersen, "Adynamic voltage scaled microprocessor system," IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1571-1580, Nov. 2000. (Pubitemid 32070549)
-
(2000)
IEEE Journal of Solid-State Circuits
, vol.35
, Issue.11
, pp. 1571-1580
-
-
Burd, T.D.1
Pering, T.A.2
Stratakos, A.J.3
Brodersen, R.W.4
-
32
-
-
19944427319
-
Dynamic voltage and frequency management for a low power embedded microprocessor
-
Jan
-
M. Nakai et al., "Dynamic voltage and frequency management for a low power embedded microprocessor," IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 28-35, Jan. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.1
, pp. 28-35
-
-
Nakai, M.1
-
33
-
-
77956008372
-
Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits
-
D. Bol, C. Hocquet, D. Flandre, and J.-D. Legat, "Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits," in Proc. Int. Circuits Syst. Conf., 2010, pp. 1484-1487.
-
(2010)
Proc. Int. Circuits Syst. Conf
, pp. 1484-1487
-
-
Bol, D.1
Hocquet, C.2
Flandre, D.3
Legat, J.-D.4
-
34
-
-
41549120666
-
Analysis and optimization of switched-capacitor DC-DC converters
-
DOI 10.1109/TPEL.2007.915182
-
M. Seeman and S. Sanders, "Analysis and optimization of switchedcapacitor dc-dc power converters," IEEE Trans. Power Electron., vol. 23, no. 2, pp. 841-851, Mar. 2008. (Pubitemid 351460527)
-
(2008)
IEEE Transactions on Power Electronics
, vol.23
, Issue.2
, pp. 841-851
-
-
Seeman, M.D.1
Sanders, S.R.2
-
35
-
-
48349094537
-
Voltage scalable switched capacitor DC-DC converter for ultra-low-power on-chip applications
-
Y. Ramadass and A. Chandrakasan, "Voltage scalable switched capacitor DC-DC converter for ultra-low-power on-chip applications," in Proc. Power Electron. Specialists Conf., 2007, pp. 2353-2359.
-
(2007)
Proc. Power Electron. Specialists Conf
, pp. 2353-2359
-
-
Ramadass, Y.1
Chandrakasan, A.2
-
36
-
-
34247202065
-
Variation-driven device sizing for minimum energy sub-threshold circuits
-
DOI 10.1145/1165573.1165578, ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design
-
J. Kwong and A. Chandrakasan, "Variation-driven device sizing for minimum energy sub-threshold circuits," in Proc. ACM Int. Symp. Low-Power Electron. Design, 2006, pp. 8-13. (Pubitemid 46609704)
-
(2006)
Proceedings of the International Symposium on Low Power Electronics and Design
, vol.2006
, pp. 8-13
-
-
Kwong, J.1
Chandrakasan, A.P.2
-
37
-
-
37749025732
-
Nanometer MOSFET variation in minimum energy subthreshold circuits
-
Jan
-
N. Verma, J. Kwong, and A. Chandrakasan, "Nanometer MOSFET variation in minimum energy subthreshold circuits," IEEE Trans. Electron Devices, vol. 55, no. 1, pp. 163-174, Jan. 2008.
-
(2008)
IEEE Trans. Electron Devices
, vol.55
, Issue.1
, pp. 163-174
-
-
Verma, N.1
Kwong, J.2
Chandrakasan, A.3
-
38
-
-
28444444598
-
Analysis and mitigation of variability in subthreshold design
-
ISLPED'05 - Proceedings of the 2005 International Symposium on Low Power Electronics and Design
-
B. Zhai, S. Hanson, D. Blaauw, and D. Sylvester, "Analysis and mitigation of variability in subthreshold design," in Proc. ACM Int. Symp. Low-Power Electron. Design, 2005, pp. 20-25. (Pubitemid 41731619)
-
(2005)
Proceedings of the International Symposium on Low Power Electronics and Design
, pp. 20-25
-
-
Zhai, B.1
Hanson, S.2
Blaauw, D.3
Sylvester, D.4
-
39
-
-
77957943636
-
Clock network design for ultra-low power applications
-
M. Seok, D. Blaauw, and D. Sylvester, "Clock network design for ultra-low power applications," in Proc. ACM Int. Symp. Low-Power Electron. Design, 2010, pp. 271-276.
-
(2010)
Proc. ACM Int. Symp. Low-Power Electron. Design
, pp. 271-276
-
-
Seok, M.1
Blaauw, D.2
Sylvester, D.3
-
40
-
-
70449704647
-
Nanometer MOSFET effects on the minimum-energy point of 45 nm subthreshold logic
-
D. Bol, D. Kamel, D. Flandre, and J.-D. Legat, "Nanometer MOSFET effects on the minimum-energy point of 45 nm subthreshold logic," in Proc. ACM Int. Symp. Low-Power Electron. Design, 2009, pp. 3-8.
-
(2009)
Proc. ACM Int. Symp. Low-Power Electron. Design
, pp. 3-8
-
-
Bol, D.1
Kamel, D.2
Flandre, D.3
Legat, J.-D.4
-
41
-
-
82955194807
-
8 T SRAM with mimicked negative bit-lines and charge limited sequential sense amplifier for wireless sensor nodes
-
V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene, "8 T SRAM with mimicked negative bit-lines and charge limited sequential sense amplifier for wireless sensor nodes," in Proc. IEEE Eur. Solid-State Res. Circuits Conf., 2011, pp. 531-534.
-
(2011)
Proc. IEEE Eur. Solid-State Res. Circuits Conf
, pp. 531-534
-
-
Sharma, V.1
Cosemans, S.2
Ashouei, M.3
Huisken, J.4
Catthoor, F.5
Dehaene, W.6
-
43
-
-
79955709150
-
A 660 pW multi-stage temperature-compensated timer for ultralow-power wireless sensor node synchronization
-
Y. Lee, B. Giridhar, Z. Foo, D. Sylvester, and D. Blaauw, "A 660 pW multi-stage temperature-compensated timer for ultralow-power wireless sensor node synchronization," in Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf., 2011, pp. 46-47.
-
(2011)
Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf
, pp. 46-47
-
-
Lee, Y.1
Giridhar, B.2
Foo, Z.3
Sylvester, D.4
Blaauw, D.5
|