3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2015-February, Issue February, 2015, Pages 28.5.1-28.5.4

  Wang, I Ting ^a   Lin, Yen Chuan ^a   Wang, Yu Fen ^a   Hsu, Chung Wei ^a   Hou, Tuo Hung ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY UTILIZATION;

ARCHITECTURE-BASED; BIOLOGICAL SYNAPSE; COMPACT MODEL; ENERGY AND COST; NEUROMORPHIC; ULTRA LOW ENERGY;

ELECTRON DEVICES;

EID: 84938273766     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2014.7047127     Document Type: Conference Paper

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