Technology Exploration for Adaptive Power and Frequency Scaling in 90nm CMOS

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn 2004-January, Issue January, 2004, Pages 14-19

  Meijer, Maurice ^a   Pessolano, Francesco ^a   De Gyvez, José Pineda ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

adaptive body bias; adaptive voltage scaling; CMOS; leakage; low power; performance optimization

Indexed keywords

CMOS INTEGRATED CIRCUITS; LEAKAGE (FLUID); LOW POWER ELECTRONICS; POWER ELECTRONICS; VARIABLE FREQUENCY OSCILLATORS; VOLTAGE SCALING;

ADAPTIVE BODY BIAS; ADAPTIVE BODY BIASING; ADAPTIVE VOLTAGE SCALING; DEEP SUB-MICRON PROCESS; DESIGN TECHNOLOGIES; FREQUENCY-SCALING; LOW POWER; PERFORMANCE OPTIMIZATIONS;

DYNAMIC FREQUENCY SCALING;

EID: 84932183462     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2004.240696     Document Type: Conference Paper

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