Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014

Volumn , Issue , 2014, Pages

  Pawlowski, Robert ^a   Crop, Joseph ^a   Cho, Minki ^a   Tschanz, James ^b   De, Vivek ^b   Fairbanks, Thomas ^c   Quinn, Heather ^c   Borkar, Shekhar ^b   Chiang, Patrick Yin ^a  

^a Oregon State University   (United States)

^b INTEL CORPORATION   (United States)

^c LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

logic; memory; near threshold; reliability; soft errors

Indexed keywords

CMOS INTEGRATED CIRCUITS; DATA STORAGE EQUIPMENT; ERROR CORRECTION; INTEGRATED CIRCUIT MANUFACTURE; LOGIC CIRCUITS; NEUTRON IRRADIATION; RADIATION HARDENING; RELIABILITY; STATIC RANDOM ACCESS STORAGE;

CIRCUIT SENSITIVITY; COMPREHENSIVE ASSESSMENT; IRRADIATION MEASUREMENT; LOGIC; NEAR THRESHOLDS; RADIATION-INDUCED; SOFT ERROR; SOFT ERROR RATE;

COMPUTER CIRCUITS;

EID: 84928128164     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2014.6946138     Document Type: Conference Paper

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