메뉴 건너뛰기




Volumn , Issue , 2002, Pages 137-141

Flash memory built-in self-test using march-like algorithms

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUILT-IN SELF TEST; DATA STORAGE EQUIPMENT; DIGITAL STORAGE; MICROPROCESSOR CHIPS; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; SEMICONDUCTOR DEVICE MANUFACTURE; SYSTEM-ON-CHIP;

EID: 84916235652     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DELTA.2002.994602     Document Type: Conference Paper
Times cited : (41)

References (10)
  • 1
    • 0031212918 scopus 로고    scopus 로고
    • Flash memory cells-an overview
    • Aug.
    • P. Pavan, R. Bez, P. Olivo, and E. Zanoni, "Flash memory cells-an overview", Proc. of the IEEE, vol. 85, no. 8, pp. 1248- 1271, Aug. 1997.
    • (1997) Proc. of the IEEE , vol.85 , Issue.8 , pp. 1248-1271
    • Pavan, P.1    Bez, R.2    Olivo, P.3    Zanoni, E.4
  • 5
    • 0034995342 scopus 로고    scopus 로고
    • Flash memory disturbances: Modeling and test
    • Marina Del Rey, California, Apr.
    • M. Mohammad and K. K. Saluja, "Flash memory disturbances: Modeling and test", in Proc. IEEE VLSI Test Symp. (VTS), Marina Del Rey, California, Apr. 2001, pp. 218 -224.
    • (2001) Proc. IEEE VLSI Test Symp. (VTS) , pp. 218-224
    • Mohammad, M.1    Saluja, K.K.2
  • 9
    • 0033749132 scopus 로고    scopus 로고
    • Simulation-based test algorithm generation for random access memories
    • Montreal, Apr.
    • C.-F. Wu, C.-T. Huang, K.-L. Cheng, and C.-W. Wu, "Simulation-based test algorithm generation for random access memories", in Proc. IEEE VLSI Test Symp. (VTS), Montreal, Apr. 2000, pp. 291-296.
    • (2000) Proc. IEEE VLSI Test Symp. (VTS) , pp. 291-296
    • Wu, C.-F.1    Huang, C.-T.2    Cheng, K.-L.3    Wu, C.-W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.