Testing flash memories

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2000, Pages 406-411

  Mohammad, Mohammad, Gh ^a   Saluja, Kewal K ^a   Yap, Alex ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRON TUNNELING; GATES (TRANSISTOR); HOT CARRIERS; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; MATHEMATICAL MODELS;

CARRIER HOT ELECTRON INJECTION; DC ERASURE; DC PROGRAMMING; DRAIN DISTURBANCE; FLASH MEMORIES; FOWLER-NORDHEIM TUNNELING;

DIGITAL STORAGE;

EID: 0033890391     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)